Integrated circuit with ESD protection circuit

An integrated circuit, comprising:

• a level shifter circuit, comprising:
• a first transistor and a second transistor separate from each other in a first direction in a layout view, wherein gate terminals of the first and second transistors are coupled together;
• and
• an ESD (electrostatic discharge) protection circuit, coupled to an internal terminal of the level shifter circuit and configured to discharge electrostatic charges between a first voltage terminal and a second voltage terminal different from the first voltage terminal,
• wherein the ESD protection circuit comprises a third transistor having first and second active regions, wherein the first active region is coupled to the internal terminal of the level shifter circuit and the second active region is coupled to the second voltage terminal,
• wherein, in the layout view, the third transistor is arranged between the first transistor and the second transistor in the first direction.

An integrated circuit, comprising:

• a first active region of a first conductivity type coupled to a first voltage terminal and corresponding to a first terminal of a first transistor and a first terminal of a second transistor included in an inverter of a level shifter circuit;
• a second active region of the first conductivity type coupled to a terminal of the level shifter circuit and corresponding to a second terminal of the first transistor;
• and
• a third active region of a second conductivity type coupled to the terminal and corresponding to a first terminal of a third transistor, wherein the second conductivity type is different from the first conductivity type;
• wherein the second terminal of the first transistor is coupled to the first terminal of the third transistor.