Gate driver circuit
AssigneeRohm Co., Ltd.
InventorHisashi Sugie
Life of this patent
Estimating the term…
Abstract
A first current source is configured to generate a first current switchable between a first current amount and a second current amount less than the first current amount. A first current mirror circuit has an input node to which the first current source is connected and is configured to fold and supply the first current to a gate of a power transistor. An on-fixing switch is connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated. A control circuit is configured to control the on-fixing switch and the first current source.
Claims17
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- and
- a control circuit structured to control the turn-on circuit and the turn-off circuit, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period, wherein an electric current supplied to the gate of the power transistor in the third period is larger than electric currents supplied to the gate of the power transistor in the first period and the second period.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- and
- a control circuit structured to control the turn-on circuit and the turn-off circuit, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period,
- wherein the on-fixing switch includes a plurality of transistors disposed on a plurality of parallel paths, and the number of the transistors in actions is variable.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- a first enable switch connected between an output node of the first current mirror circuit and the gate of the power transistor;
- and
- a control circuit structured to control the turn-on circuit and the turn-off circuit, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period,
- wherein the control circuit turns on the first enable switch in the first period and the second period, and turns off the first enable switch in a fourth period following the third period.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- a first enable switch connected between an output node of the first current mirror circuit and the gate of the power transistor;
- and
- a control circuit structured to control the turn-on circuit and the turn-off circuit, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period,
- wherein the control circuit turns on the first enable switch in the third period.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- and
- a control circuit structured to control the turn-on circuit and the turn-off circuit, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period,
- wherein the first current source includes:
- an output node;
- a first constant current circuit connected to the output node;
- a first switch and a second constant current circuit connected in series between the output node and a ground;
- and
- a second switch and a third constant current circuit connected in series between an output of the second constant current circuit and the ground.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- a control circuit structured to control the turn-on circuit and the turn-off circuit;
- and
- a first sensor structured to compare a gate-source voltage of the power transistor with a first threshold voltage, wherein
- the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period,
- wherein
- the control circuit shifts to the second period in response to a change in output of the first sensor in the first period.
A gate driver circuit structured to drive an N-type power transistor constituting a switching circuit, the gate driver circuit comprising:
- a turn-on circuit structured to source an electric current to a gate of the power transistor;
- a turn-off circuit structured to sink an electric current from the gate of the power transistor;
- a control circuit structured to control the turn-on circuit and the turn-off circuit;
- and
- a second sensor structured to compare an output voltage of the switching circuit with a second threshold voltage, wherein the turn-on circuit includes:
- a first current source structured to generate a first current switchable between a first current amount and a second current amount less than the first current amount;
- a first current mirror circuit having an input node to which the first current source is connected, the first current mirror circuit being structured to fold and supply the first current to the gate of the power transistor;
- and
- an on-fixing switch connected between the gate of the power transistor and a high-level line in which a high voltage equivalent to a high level of a gate voltage of the power transistor is generated,
- the control circuit is configured to control the on-fixing switch and the first current source, and
- the control circuit is configured to, in response to an instruction to turn on the power transistor,
- (i) set the first current to the first current amount and turn off the on-fixing switch in a first period,
- (ii) set the first current to the second current amount and turn off the on-fixing switch in a second period, and
- (iii) turn on the on-fixing switch in a third period, wherein the control circuit shifts to the third period in response to a change in output of the second sensor in the second period.
Dependencies are inferred from the claim text.