Low-voltage high-speed programmable equalization circuit
AssigneeXiamen Ux Ic Co., Ltd.
InventorsFaming Li, Yonghui Lin, Ming Hong
Life of this patent
Estimating the term…
Abstract
A low-voltage high-speed programmable equalization circuit includes a gain boosting amplifier stage, a CML differential amplifier stage, and an emitter follower. An input terminal of the gain boosting amplifier stage serves as an input terminal of the equalization circuit. An output terminal of the gain boosting amplifier stage is connected to an input terminal of the CML differential amplifier stage. An output terminal of the CML differential amplifier stage is connected to an input terminal of the emitter follower. An output terminal of the emitter follower serves as an output terminal of the equalization circuit.
Claims4
An equalization circuit, comprising a gain boosting amplifier stage, a CML differential amplifier stage, and an emitter follower;
- an input terminal of the gain boosting amplifier stage serving as an input terminal of the equalization circuit, an output terminal of the gain boosting amplifier stage being connected to an input terminal of the CML differential amplifier stage;
- an output terminal of the CML differential amplifier stage being connected to an input terminal of the emitter follower, an output terminal of the emitter follower serving as an output terminal of the equalization circuit;
- the gain boosting amplifier stage including an input common-mode voltage bias unit, an input impedance matching unit, a pure resistor network path unit, a resistor-capacitor network high-pass path unit, a first differential amplifier circuit, and a second differential amplifier circuit;
- the input common-mode voltage bias unit being configured to set a bias voltage of the gain boosting amplifier stage, the input impedance matching unit being configured to match an input impedance of the gain boosting amplifier stage with an impedance of an input module board connected to a chip;
- the input terminal of the gain boosting amplifier stage being connected to the pure resistor network path unit, the pure resistor network path unit being connected to the first differential amplifier circuit, the first differential amplifier circuit being connected to the output terminal of the gain boosting amplifier stage;
- the input terminal of the gain boosting amplifier stage being connected to the resistor-capacitor network high-pass path unit, the resistor-capacitor network high-pass path unit being connected to the second differential amplifier circuit, the second differential amplifier circuit being connected to the output terminal of the gain boosting amplifier stage;
- each of the first differential amplifier circuit and the second differential amplifier circuit being provided with a variable current source, a total current of the two variable current sources being kept constant.
Dependencies are inferred from the claim text.