Back gate biasing of crystal oscillators for enhanced negative resistance

A method of generating an oscillation signal using a crystal oscillator, the method comprising:

• receiving an input oscillation signal from a crystal as an input to an inverter;
• inverting the input oscillation using an n-type metal oxide semiconductor transistor and a p-type metal oxide semiconductor transistor of the inverter;
• adjusting a negative resistance of the inverter by controlling a body bias of at least one of the n-type metal oxide semiconductor transistor or the p-type metal oxide semiconductor transistor using a back gate bias control circuit;
• providing a reference voltage to a source of the p-type metal oxide semiconductor transistor using a reference voltage control circuit;
• and
• further adjusting the negative resistance of the inverter by controlling a voltage level of the reference voltage.

A timing system comprising:

• a phase locked-loop configured to receive a reference clock signal;
• a crystal oscillator including a crystal, an inverter having an input connected to a first terminal of the crystal and an output connected to a second terminal of the crystal, the inverter including an n-type metal oxide semiconductor transistor and a p-type metal oxide semiconductor transistor configured to invert an input oscillation signal from the crystal to generate the reference clock signal, the crystal oscillator further including a back gate bias control circuit configured to adjust a negative resistance of the inverter by controlling a body bias of at least one of the n-type metal oxide semiconductor transistor or the p-type metal oxide semiconductor transistor;
• and
• a reference voltage control circuit configured to provide a reference voltage to a source of the p-type metal oxide semiconductor transistor, the reference voltage control circuit configured to further adjust the negative resistance of the inverter by controlling a voltage level of the reference voltage.