Recursive analog content addressable memory device

A device comprising:

• a lower bound comparison circuit comprising first comparison stages, each of the first comparison stages comprising a first match line and a first analog content addressable memory connected between the first match line and a reference node, wherein the first match lines of adjacent one of the first comparison stages are serially connected;
• an upper bound comparison circuit comprising second comparison stages, each of the second comparison stages comprising a second match line and a second analog content addressable memory connected between the second match line and the reference node, wherein the second match lines of adjacent one of the second comparison stages are serially connected;
• and
• a combining circuit connected to the lower bound comparison circuit and the upper bound comparison circuit.

A method comprising:

• partitioning a range into a plurality of bit segments, the range having a higher precision than the bit segments;
• storing the bit segments in comparison stages, each of the comparison stages comprising a match line and an analog content addressable memory connected between the match line and a reference node, wherein the match lines of adjacent one of the comparison stages are serially connected;
• partitioning an input value into a plurality of analog inputs;
• and
• comparing the analog inputs against the bit segments to determine whether the input value falls in the range.