Upsampling an image using one or more neural networks

A non-transitory machine-readable medium having stored thereon a set of instructions, which if performed by a system on a chip (SoC), cause the SoC to at least:

• generate an upsampled image using an upscaler including a first neural network;
• output weights using a different second neural network, where the weights are to be generated based, at least in part, on a lower resolution image;
• generate a high-resolution output image based, at least in part, on reconstructing the upsampled image using the weights output by the different second neural network;
• and
• wherein the SoC comprises:
• a graphics processing unit (GPU), comprising:
• sets of graphics cores that share a cache memory;
• memory coupled to the sets of graphics cores;
• and
• wherein each of the graphics cores comprises:
• an instruction cache;
• a cache/shared memory;
• integer logic units;
• floating point logic units to perform at least one of 16-bit, 32-bit, or 64-bit floating point operations;
• and
• matrix processing units (MPUs) to perform at least one of half-precision floating point or 8-bit integer operations.

A method, comprising:

• generating, by a system on a chip (SoC), an upsampled image;
• outputting, by the SoC, weights from a neural network based, at least in part, on a lower resolution image;
• and
• generating, by the SoC, a high-resolution output image based, at least in part, on reconstructing the upsampled image using the weights output by the neural network, wherein the SoC comprises:
• a graphics processing unit (GPU), comprising:
• sets of graphics cores that share a cache memory;
• memory coupled to the sets of graphics cores;
• and
• wherein each of the graphics cores comprises:
• an instruction cache;
• a cache/shared memory;
• integer logic units;
• floating point logic units to perform at least one of 16-bit, 32-bit, or 64-bit floating point operations;
• and
• matrix processing units (MPUs) to perform at least one of half-precision floating point or 8-bit integer operations.

A system comprising:

• one or more systems on a chip (SoCs) to:
• generate an upsampled image using an upscaler including a first neural network;
• output weights using a different second neural network, where the weights are to be generated based, at least in part, on a lower resolution image;
• generate a high-resolution output image based, at least in part, on reconstructing the upsampled image using the weights output by the different second neural network;
• and
• wherein the one or more SoCs comprise:
• a graphics processing unit (GPU), comprising:
• sets of graphics cores that share a cache memory;
• memory coupled to the sets of graphics cores;
• and
• wherein each of the graphics cores comprises:
• an instruction cache;
• a cache/shared memory;
• integer logic units;
• floating point logic units to perform at least one of 16-bit, 32-bit, or 64-bit floating point operations;
• and
• matrix processing units (MPUs) to perform at least one of half-precision floating point or 8-bit integer operations.