US 12,711,404 B1Granted

Prediction of logic optimization algorithms using machine learning

AssigneeXilinx, Inc.

InventorsAkhil Tharad, Aman Gayasen, Padmini Gopalakrishnan, Jagadeesh Vasudevamurthy

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Abstract

Embodiments herein describe optimizing a netlist using machine learning (ML) models that predict which of a plurality of optimization strategies (e.g., a plurality of optimization algorithms) will provide the best results. The netlist can then be optimized using the optimization strategy. Doing so provides significant time and compute resources savings since the netlist can be optimized only once using the selected optimization strategy rather than having to be optimized using each of the plurality of optimization strategies. Moreover, the embodiments herein can permit the addition of more optimization strategies, which could not be considered earlier because of runtime constraints.

Claims17

Dependent claims

A method, comprising:

partitioning a netlist into a plurality of partitions based on parameters of hardware represented in the plurality of partitions, wherein the netlist defines a schematic for fabricating an application-specific integrated circuit (ASIC);
for each of the plurality of partitions:
extracting a feature from the partition that defines the schematic for the ASIC including:
information, statistics, or metadata derived from the partition;
providing the extracted feature as an input to a plurality of machine learning (ML) models, wherein each of the plurality of ML models corresponds to a respective one of a plurality of optimization algorithms, and wherein each of the plurality of ML models is one of:
binary classification models, random forest models, gradient boosting models, or models based on a k-nearest neighbor (KNN) algorithm;
generating, at each ML model, a score indicating a likelihood that the respective optimization algorithm is better at optimizing the partition relative to the other plurality of optimization algorithms represented by the other ML models;
and
implementing a selected optimization algorithm on optimizing the partition based on the scores output by the plurality of ML models, wherein at least one of the plurality of optimization algorithms is not used to optimize the partition;
and
fabricating the ASIC using the optimized plurality of partitions of the netlist.

8 more elements

A non-transitory computer readable storage medium storing instructions, which when executed on one or more processing devices, perform an operation, the operation comprising:

partitioning a netlist into a plurality of partitions based on parameters of hardware represented in the plurality of partitions, wherein the netlist defines a schematic for fabricating an application-specific integrated circuit (ASIC);
for each of the plurality of partitions:
extracting a feature from the partition that defines the schematic for the ASIC including:
information, statistics, or metadata derived from the partition;
providing the extracted feature as an input to a plurality of machine learning (ML) models, wherein each of the plurality of ML models corresponds to a respective one of a plurality of optimization algorithms, and wherein each of the plurality of ML models is one of:
binary classification models, random forest models, gradient boosting models, or models based on a k-nearest neighbor (KNN) algorithm;
generating, at each ML model, a score indicating a likelihood that the respective optimization algorithm is better at optimizing the partition relative to the other plurality of optimization algorithms represented by the other ML models;
and
implementing a selected optimization algorithm on optimizing the partition based on the scores output by the plurality of ML models, wherein at least one of the plurality of optimization algorithms is not used to optimize the partition;
and
fabricating the ASIC using the optimized plurality of partitions of the netlist.

8 more elements

A method, comprising:

partitioning a netlist into a plurality of partitions based on parameters of hardware represented in the plurality of partitions, wherein the netlist defines a schematic for fabricating an application-specific integrated circuit (ASIC);
for each of the plurality of partitions:
extracting a feature from the partition that defines the schematic for the ASIC including:
information, statistics, or metadata derived from the partition;
providing the extracted feature as an input to a plurality of machine learning (ML) models, wherein each of the plurality of ML models corresponds to a respective one of a plurality of optimization algorithms, and wherein each of the plurality of ML models is one of:
binary classification models, random forest models, gradient boosting models, or models based on a k-nearest neighbor (KNN) algorithm;
receiving scores from the plurality of ML models indicating a likelihood that the respective optimization algorithm is better at optimizing the partition relative to the other plurality of optimization algorithms represented by the other ML models as a result of processing the extracted feature;
selecting one of the plurality of optimization algorithms based on comparing the scores;
and
implementing the selected one of the plurality of optimization algorithms on optimizing the partition, wherein at least one of the plurality of optimization algorithms is not used to optimize the partition;
and
fabricating the ASIC using the optimized plurality of partitions of the netlist.

9 more elements

Dependencies are inferred from the claim text.