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US 12,711,282 B2Granted
Physically unclonable function cells with hot carrier injection
AssigneeNVIDIA Corporation
InventorsMahmut Ersin Sinangil, Sudhir Shrikantha Kudva, Yan He
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Abstract
Devices including an arrangement of multiple of physically unclonable function (PUF) cells organized to generate a bit pattern, and wherein the PUF cells each includes multiple inverting stages, each inverting stage configured to enable a short circuit between outputs of a pair of inverters to enable accelerated aging of one of the inverters.
Claims18
A device comprising:
- a plurality of physically unclonable function (PUF) cells arranged to generate a bit pattern;
- and wherein the PUF cells each comprises a plurality of inverting stages;
- wherein the plurality of inverting stages are arranged into an edge chasing circuit;
- each inverting stage configured to enable a short circuit between outputs of a pair of inverters to enable accelerated aging of one of the inverters;
- and wherein a first of the inverting stages is configured to receive an aging value and a second of the inverting stages adjacent to the first of the inverting stages is configured to receive a complement of the aging value.
2 more elements
A physically unclonable function (PUF) cell comprising:
- an edge chasing arrangement of inverting stages arranged into an edge chasing circuit each comprising a first inverter;
- and one or more of the inverting stages configured to enable accelerated hot carrier injection (HCI) aging on the first inverter by shorting an output of the first inverter with an output of a second inverter;
- and wherein a first of the inverting stages is configured to receive an aging value and a second of the inverting stages adjacent to the first of the inverting stages is configured to receive a complement of the aging value.
A physically unclonable function (PUF) cell comprising:
- a plurality of inverting stages arranged in an edge-chasing circuit;
- each inverting stage configured to enable a short circuit between outputs of a pair of inverters to enable accelerated aging of one of the inverters;
- and wherein a first of the inverting stages is configured to receive an aging value and a second of the inverting stages adjacent to the first of the inverting stages is configured to receive a complement of the aging value.
Dependencies are inferred from the claim text.