Memory device for outputting data and operating method thereof
AssigneeSK hynix Inc.
InventorsJi Seong Mun, Chan Keun Kwon, Young Seung Yoo
Life of this patent
Estimating the term…
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AssigneeSK hynix Inc.
InventorsJi Seong Mun, Chan Keun Kwon, Young Seung Yoo
Estimating the term…
A semiconductor device includes at least two planes including a plurality of memory bank groups, each of the plurality of memory bank groups including a plurality of memory banks, a plurality of compressing circuits, each coupled to at least two memory banks, the at least two memory banks being included in the same plane, each of the plurality of compressing circuits compressing a plurality of data read from the at least two memory banks to output compressed data, at least one merge circuit receiving a plurality of compressed data from at least two compressing circuits and merging the plurality of compressed data to output merged data, and an output buffer circuit receiving a plurality of merged data and outputting the plurality of merged data to an external device, wherein each memory bank, among the at least two memory banks, is included in different memory bank groups.
A memory device, comprising:
A method of operating a memory device including a plurality of planes, each including a plurality of memory banks, the method comprising:
A memory device, comprising:
Dependencies are inferred from the claim text.