US 12,710,694 B2 · Mask optimization for first layer that accounts for other layers

Abstract

Some embodiments provide a method for optimizing a mask layout for producing masks that are used for manufacturing an integrated circuit (IC) comprising multiple layers of components. The method receives a mask layout including a set of mask images corresponding to a first layer of components of the IC that is adjacent to at least a second layer of components. The method generates a first wafer image including representations of IC components that are predicted to be manufactured for the first layer based on the received set of mask images corresponding to the first layer. Based on a positional relationship between at least one predicted IC component in the first wafer image and at least one predicted IC component in a second wafer image for the second layer, the method modifies at least one mask image in the set of mask images for the first layer.

Claims16

Dependent claims

A method for optimizing a mask layout for producing masks that are used for manufacturing an integrated circuit (IC) comprising multiple layers of components, the method comprising:

receiving a mask layout comprising a set of mask images corresponding to a first layer of components of the IC that is adjacent to at least a second layer of components;
generating a second-layer wafer image for the second layer of components based on a set of mask images corresponding to the second layer;
and
iteratively:
generating a first-layer wafer image comprising representations of IC components that are predicted to be manufactured for the first layer based on a current set of mask images corresponding to the first layer;
and based on a positional relationship between at least one predicted IC component in the first-layer wafer image and at least one predicted IC component in the second-layer wafer image, modifying at least one mask image in the current set of mask images for the first layer to generate a modified set of mask images for the first layer,
wherein the second-layer wafer image is generated once and used each iteration for modifying the at least one mask image for the first layer.

4 more elements

A non-transitory machine-readable medium storing a program which when executed by at least one processing unit optimizes a mask layout for producing masks that are used for manufacturing an integrated circuit (IC) comprising multiple layers of components, the program comprising sets of instructions for:

receiving a mask layout comprising a set of mask images corresponding to a first layer of components of the IC that is adjacent to at least a second layer of components;
generating a second-layer wafer image for the second layer of components based on a set of mask images corresponding to the second layer;
and
iteratively:
generating a first-layer wafer image comprising representations of IC components that are predicted to be manufactured for the first layer based on a current set of mask images corresponding to the first layer;
and
based on a positional relationship between at least one predicted IC component in the first-layer wafer image and at least one predicted IC component in the second-layer wafer image, modifying at least one mask image in the current set of mask images for the first layer to generate a modified set of mask images for the first layer,
wherein the second-layer wafer image is generated once and used each iteration for modifying the at least one mask image for the first layer.

5 more elements

Dependencies are inferred from the claim text.

Mask optimization for first layer that accounts for other layers

Life of this patent

Mask optimization for first layer that accounts for other layers

Life of this patent

Abstract

Claims16