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US 12,710,522 B2Granted
Apparatus
AssigneeCanon Medical Systems Corporation
InventorMasaaki Ishitsuka
Life of this patent
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Abstract
An apparatus according to the embodiment includes a first delay circuit, a second delay circuit, and processing circuitry. The first delay circuit delays an ultrasound signal in a first channel using a plurality of capacitors. The second delay circuit delays an ultrasound signal in a second channel using a plurality of capacitors. The processing circuitry make a first write start position in which writing the ultrasound signal in the capacitor in the first delay circuit is started and a second write start position in which writing the ultrasound signal in the capacitor in the second delay circuit is started different from each other.
Claims13
An apparatus, comprising:
- a first delay circuit that delays an ultrasound signal in a first channel using a first plurality of capacitors, the first delay circuit corresponding to the first channel;
- a second delay circuit that delays an ultrasound signal in a second channel, which is different from the first channel, using a second plurality of capacitors, the second delay circuit corresponding to the second channel;
- a third delay circuit that delays an ultrasound signal in a third channel using a third plurality of capacitors;
- a fourth delay circuit that delays an ultrasound signal in a fourth channel using a fourth plurality of capacitors;
- processing circuitry configured to make a first write start position in which writing the ultrasound signal in a capacitor in the first delay circuit is started and a second write start position in which writing the ultrasound signal in a capacitor in the second delay circuit is started different from each other by inputting a control signal which has a periodicity, to each of the first delay circuit and the second delay circuit;
- and
- summing circuitry configured to generate a summing signal by summing the ultrasound signal that is delayed by the first delay circuit and the ultrasound signal that is delayed by the second delay circuit,
- wherein the processing circuitry is further configured to make the first write start position and the second write start position different from each other such that a periodic noise resulting from the periodicity of the control signal and contained in the summing signal is smaller than a periodic noise resulting from the periodicity of the control signal and contained in the ultrasound signal that is delayed by the first delay circuit and in the ultrasound signal that is delayed by the second delay circuit, and
- wherein the processing circuitry is further configured to make the first write start position, the second write start position, a third write start position in which writing the ultrasound signal in a capacitor in the third delay circuit is started, and a fourth write start position in which writing the ultrasound signal in a capacitor in the fourth delay circuit is started different from one another such that a phase difference between the ultrasound signal that is delayed by the third delay circuit and the ultrasound signal that is delayed by the fourth delay circuit is 180 degrees and a phase difference between the ultrasound signal that is delayed by the first delay circuit and the ultrasound signal that is delayed by the third delay circuit and a phase difference between the ultrasound signal that is delayed by the second delay circuit and the ultrasound signal that is delayed by the fourth delay circuit are 90 degrees.
6 more elements
An apparatus, comprising:
- a first delay circuit that delays an ultrasound signal in a first channel using a first plurality of capacitors, the first delay circuit corresponding to the first channel;
- a second delay circuit that delays an ultrasound signal in a second channel, which is different from the first channel, using a second plurality of capacitors, the second delay circuit corresponding to the second channel;
- processing circuitry configured to make a first write start position in which writing the ultrasound signal in a capacitor in the first delay circuit is started and a second write start position in which writing the ultrasound signal in a capacitor in the second delay circuit is started different from each other;
- and
- summing circuitry configured to generate a summing signal by summing the ultrasound signal that is delayed by the first delay circuit and the ultrasound signal that is delayed by the second delay circuit,
- wherein the processing circuitry is further configured to make the first write start position and the second write start position different from each other such that a noise contained in the summing signal is smaller than a noise contained in the ultrasound signal that is delayed by the first delay circuit and in the ultrasound signal that is delayed by the second delay circuit,
- wherein the apparatus further comprises
- a third delay circuit that delays an ultrasound signal in a third channel using a third plurality of capacitors;
- and
- a fourth delay circuit that delays an ultrasound signal in a fourth channel using a fourth plurality of capacitors;
- and
- wherein the processing circuitry is further configured to make the first write start position, the second write start position, a third write start position in which writing the ultrasound signal in a capacitor in the third delay circuit is started, and a fourth write start position in which writing the ultrasound signal in a capacitor in the fourth delay circuit is started different from one another such that a phase difference between the ultrasound signal that is delayed by the third delay circuit and the ultrasound signal that is delayed by the fourth delay circuit is 180 degrees and a phase difference between the ultrasound signal that is delayed by the first delay circuit and the ultrasound signal that is delayed by the third delay circuit and a phase difference between the ultrasound signal that is delayed by the second delay circuit and the ultrasound signal that is delayed by the fourth delay circuit are 90 degrees.
9 more elements
Dependencies are inferred from the claim text.