Socket for testing semiconductor device

A socket for testing a semiconductor package, the socket comprising:

• a body including a lower socket portion having a lower surface and an upper surface opposite the lower surface and provided with a through-hole through which, during testing, a meter reading pin in contact with a solder ball provided in a wafer level package penetrates, and an upper socket portion having an upper surface and having a lower surface facing the upper surface of the lower socket portion, the upper socket portion disposed above the lower socket portion;
• and
• a plurality of spacers installed on the upper surface of the lower socket portion, to be disposed between the upper surface of the lower socket portion and the lower surface of the upper socket portion, and positioned to contact one surface of the wafer level package during testing,
• wherein the plurality of spacers are disposed spaced apart from each other on the upper surface of the lower socket portion, and
• wherein each spacer has a cylindrical or polygonal column shape.

A socket for testing a semiconductor package, the socket comprising:

• a body having an internal space configured to accommodate a semiconductor package;
• and
• at least a first spacer on the body and positioned to contact a first surface of the semiconductor package when the semiconductor package is placed on the body,
• wherein the body includes a lower socket portion provided with through-holes, configured through which to receive meter reading pins that contact external connection terminals of the semiconductor package, and an upper socket portion disposed above the lower socket portion, and
• wherein the first spacer is disposed on an upper surface of the lower socket portion that faces a lower surface of the upper socket portion and faces the first surface of the semiconductor package when the semiconductor package is placed on the body.