Semiconductor structure and manufacturing method thereof

A semiconductor structure, comprising:

• a first wafer comprising:
• a first semiconductor substrate;
• a first conductive structure in the first semiconductor substrate;
• a first dielectric structure, residing on the first semiconductor substrate, that includes a first recessed portion;
• a second conductive structure disposed within the first recessed portion, the second conductive structure having a surface that forms a first concave recessed portion in the second conductive structure;
• and
• a first conductive material disposed within the first concave recessed portion of the second conductive structure,
• wherein the first conductive material has at least one surface that is generally planar;
• and
• a second wafer comprising:
• a second semiconductor substrate,
• a third conductive structure in the second semiconductor substrate,
• wherein, in a sideview of the semiconductor structure, the third conductive structure is offset from the first conductive structure;
• a second dielectric structure, residing on the second semiconductor substrate, that includes a second recessed portion;
• a fourth conductive structure disposed within the second recessed portion, the fourth conductive structure having a surface that forms a second concave recessed portion in the fourth conductive structure;
• and
• a second conductive material disposed within the second concave recessed portion,
• wherein the second conductive material has at least one surface that is generally planar,
• wherein the fourth conductive structure is laterally offset relative to the second conductive structure.

A method of forming a semiconductor structure, comprising:

• depositing a conductive structure within a recessed portion of a dielectric structure;
• polishing a top surface of the semiconductor structure, the polishing forming a concave recessed portion in the conductive structure;
• and
• forming a conductive material within the concave recessed portion to form a substantially planar top surface for the semiconductor structure, wherein forming the conductive material comprises depositing multiple two-dimensional layers of the conductive material within the concave recessed portion.