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US 12,708,009 B2Granted
Semiconductor package with organic interposer
AssigneeSamsung Electronics Co., Ltd.
InventorMyung Sam Kang
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Abstract
A semiconductor package includes a package substrate, an organic interposer on the package substrate, the organic interposer including a plurality of organic insulating layers including an organic compound, at least two semiconductor chips on the organic interposer, and a mold, on an upper surface of the organic interposer, surrounding the at least two semiconductor chips.
Claims20
A semiconductor package comprising:
- a package substrate;
- an organic interposer on the package substrate, the organic interposer comprising a plurality of organic insulating layers comprising an organic compound;
- at least two semiconductor chips on the organic interposer;
- and
- a mold, on an upper surface of the organic interposer, surrounding the at least two semiconductor chips,
- wherein the organic interposer comprises a plurality of first vias penetrating the plurality of organic insulating layers and connecting a first upper pad with a lower pad,
- wherein the plurality of first vias have a width that narrows in a direction from the lower pad to the first upper pad, and
- wherein an upper surface of at least one of the plurality of first vias is aligned with a lower surface of the mold.
5 more elements
A semiconductor package comprising:
- a package substrate;
- an organic interposer on the package substrate, the organic interposer comprising a stacked structure comprising a first organic insulating layer, a second organic insulating layer, a third organic insulating layer, and a fourth organic insulating layer comprising an organic compound;
- a first semiconductor chip and a second semiconductor chip on the organic interposer;
- and
- a mold surrounding the first semiconductor chip and the second semiconductor chip from an upper surface of the organic interposer,
- wherein the organic interposer further comprises:
- a plurality of first upper pads on an upper surface of the fourth organic insulating layer,
- a plurality of lower pads on a lower surface of the first organic insulating layer, and,
- a plurality of first vias penetrating the first organic insulating layer, the second organic insulating layer, the third organic insulating layer, and the fourth organic insulating layer and connecting the plurality of first upper pads with the plurality of lower pads, and
- wherein the plurality of first vias have a width that narrows in a direction from the plurality of first upper pads to the plurality of lower pads.
7 more elements
A semiconductor package comprising:
- a package substrate;
- an organic interposer on the package substrate, the organic interposer comprising a stacked structure comprising a first organic insulating layer, a second organic insulating layer, a third organic insulating layer, and a fourth organic insulating layer comprising an organic compound;
- a first semiconductor chip and a second semiconductor chip on the organic interposer;
- a final mold surrounding the first semiconductor chip and the second semiconductor chip from an upper surface of the organic interposer;
- a heat dissipation member on first upper surfaces and first upper portions of outer walls of the first semiconductor chip and on second upper surfaces and second upper portions of the second semiconductor chip, the heat dissipation member abutting the final mold;
- and
- an under fill surrounding a plurality of lower pads and a plurality of lower bumps, the plurality of lower pads and the plurality of lower bumps being on a lower surface of the organic interposer between the organic interposer and the package substrate,
- wherein the organic interposer further comprises:
- a plurality of first vias penetrating from the first organic insulating layer to the fourth organic insulating layer, and connecting first upper pads on an upper surface of the fourth organic insulating layer and lower pads on a lower surface of the first organic insulating layer;
- a plurality of redistribution layers in each of the first organic insulating layer, the second organic insulating layer, the third organic insulating layer, and the fourth organic insulating layer;
- and
- a plurality of second vias connecting at least two of the plurality of redistribution layers inside the first organic insulating layer, the second organic insulating layer, the third organic insulating layer, and the fourth organic insulating layer,
- wherein the plurality of first vias have a width that widens in a direction from the first upper pads to the lower pads, and
- wherein the heat dissipation member directly contacts an outer wall of the first semiconductor chip, an outer wall of the second semiconductor chip and an upper surface of the final mold.
11 more elements
Dependencies are inferred from the claim text.