Heat removing layer surrounding a transistor
AssigneeInvention and Collaboration Laboratory, Inc.
InventorsChao-Chun Lu, Wen-Hsien Tu, Feng-Wu Chen
Life of this patent
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Abstract
A semiconductor circuit structure includes a semiconductor substrate with an original semiconductor surface, an active region within the semiconductor substrate, and a transistor formed based on the active region. The transistor includes a gate structure, a first spacer neighboring to a first sidewall of the gate structure, and a second spacer neighboring to a second sidewall of the gate structure. Wherein a thermal conductivity of the first spacer or the second spacer includes is higher than the thermal conductivity of silicon nitride (Si3N4).
Claims11
A semiconductor circuit structure comprising:
- a semiconductor substrate with an original semiconductor surface;
- an active region within the semiconductor substrate;
- and
- a transistor formed within the active region, the transistor comprising:
- a gate structure with a gate conductive layer;
- a first spacer neighboring to a first sidewall of the gate structure;
- and
- a second spacer neighboring to a second sidewall of the gate structure;
- and
- a shallow trench isolation (STI) region comprising a heat removing layer surrounding the transistor;
- wherein a top surface of the heat removing layer is higher than that of the gate conductive layer, and a thermal conductivity of the heat removing layer is higher than that of SiO2.
A semiconductor circuit structure comprising:
- a semiconductor substrate with an original semiconductor surface;
- an active region within the semiconductor substrate;
- and
- a transistor formed within the active region, the transistor comprising:
- a gate structure with a gate conductive layer;
- a first spacer neighboring to a first sidewall of the gate structure;
- and
- a second spacer neighboring to a second sidewall of the gate structure;
- a channel region covered by the gate structure;
- a source structure coupled to a first terminal of the channel region;
- and
- a drain structure coupled to a second terminal of the channel region;
- wherein the first spacer is between the gate structure and the source structure, and the second spacer is between the gate structure and the drain structure;
- and
- a heat removing layer surrounding the transistor;
- wherein a top surface of the heat removing layer is higher than that of the gate conductive layer, and a thermal conductivity of the heat removing layer is higher than that of SiO2.
A semiconductor circuit structure comprising:
- a semiconductor substrate with an original semiconductor surface;
- an active region within the semiconductor substrate;
- and
- a transistor formed within the active region, the transistor comprising:
- a gate structure with a gate conductive layer;
- a first spacer neighboring to a first sidewall of the gate structure;
- and
- a second spacer neighboring to a second sidewall of the gate structure;
- and
- a heat removing layer surrounding the transistor;
- wherein a top surface of the heat removing layer is higher than that of the gate conductive layer, and a thermal conductivity of the heat removing layer is higher than that of SiO2;
- wherein the heat removing layer is undoped polysilicon or large-grain silicon.
A semiconductor circuit structure comprising:
- a semiconductor substrate with an original semiconductor surface;
- an active region within the semiconductor substrate;
- and
- a transistor formed within the active region, the transistor comprising:
- a gate structure with a gate conductive layer;
- a first spacer neighboring to a first sidewall of the gate structure;
- and
- a second spacer neighboring to a second sidewall of the gate structure;
- a heat removing layer surrounding the transistor;
- wherein a top surface of the heat removing layer is higher than that of the gate conductive layer, and a thermal conductivity of the heat removing layer is higher than that of SiO2;
- and
- a dielectric lying layer covering sidewalls of the heat removing layer to electrically isolated the heat removing layer from the semiconductor substrate.
Dependencies are inferred from the claim text.