Method of manufacturing semiconductor devices including a cap insulating layer
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Hang Chiu, Chi On Chui
Life of this patent
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Abstract
In method of manufacturing a semiconductor device, an opening is formed over a first conductive layer in a dielectric layer, a second conductive layer is formed over the first conductive layer in the opening without forming the second conductive layer on at least an upper surface of the dielectric layer, a third conductive layer is formed over the second conductive layer in the opening without forming the third conductive layer on at least an upper surface of the dielectric layer, and an upper layer is formed over the third conductive layer in the opening.
Claims20
A method of manufacturing a semiconductor device, comprising:
- forming a gate space in a dielectric layer by removing a sacrificial gate electrode;
- forming a gate dielectric layer in the gate space;
- forming at least three conductive layers on the gate dielectric layer to fully fill the gate space;
- recessing the gate dielectric layer and the at least three conductive layers to form recessed conductive layers,
- wherein the at least three conductive layers are recessed to a substantially same height;
- forming a first cap metal layer on the recessed conductive layers in the gate space without forming the first cap metal layer on an upper surface of the dielectric layer;
- and
- forming a cap insulating layer over the first cap metal layer in the gate space,
- wherein the cap insulating layer is separated from the recessed conductive layers by the first cap metal layer.
A method of manufacturing a semiconductor device, comprising:
- forming an opening in a dielectric layer by removing a sacrificial gate electrode;
- forming a gate dielectric layer in the opening;
- forming a barrier layer over the gate dielectric layer;
- forming a work function adjustment material layer over the barrier layer;
- forming a blocking metal layer over the work function adjustment material layer over to fully fill the opening;
- recessing the gate dielectric layer, barrier layer, work function adjustment material layer, and the blocking metal layer to form a recess in the dielectric layer,
- wherein the barrier layer, work function adjustment material layer, and the blocking metal layer are recessed to a substantially same height;
- forming a first cap metal layer in the recess without forming the first cap metal layer on an upper surface of the dielectric layer;
- and
- forming a cap insulating layer over the first cap metal layer in the recess,
- wherein the cap insulating layer is separated from the recessed gate dielectric layer, barrier layer, work function adjustment material layer, and blocking metal layer by the first cap metal layer.
A method of manufacturing a semiconductor device, comprising:
- forming an opening in a dielectric layer by removing a sacrificial gate electrode;
- forming a gate dielectric layer in the opening;
- forming a first conductive layer over the gate dielectric layer;
- forming a second conductive layer over the first conductive layer;
- recessing the first conductive layer and the second conductive layer to expose a portion of the gate dielectric layer;
- forming a third conductive layer over the recessed second conductive layer and the exposed portion of the gate dielectric layer;
- forming a fourth conductive layer over the third conductive layer to fully fill the opening;
- recessing the gate dielectric layer, the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer to form a recess in the dielectric layer,
- wherein the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer are recessed to a substantially same height;
- forming a first cap metal layer in the recess without forming the first cap metal layer on an upper surface of the dielectric layer;
- and
- forming a cap insulating layer over the first cap metal layer in the recess,
- wherein the cap insulating layer is separated from the recessed gate dielectric layer, first conductive layer, second conductive layer, third conductive layer, and the fourth conductive layer by the first cap metal layer.
Dependencies are inferred from the claim text.