Method of forming a semiconductor device having gate spacers with regions of diffused silicon germanium

A method, comprising:

• forming, over a semiconductor substrate, a plurality of nanostructure layers in a direction that is perpendicular to the semiconductor substrate, wherein the plurality of nanostructure layers comprises a plurality of sacrificial layers alternating with a plurality of channel layers;
• forming, over the plurality of nanostructure layers, a dummy gate structure;
• forming, along a sidewall of the dummy gate structure, a first spacer layer comprising a first material;
• forming, on the first spacer layer, a second spacer layer comprising a second material;
• forming, on the second spacer layer and on a top surface of a source drain region adjacent to the plurality of nanostructure layers, a third spacer layer comprising a third material,
• wherein a portion of at least one of the first spacer layer or the third spacer layer comprises a region of diffused silicon germanium;
• removing the dummy gate structure;
• removing the plurality of sacrificial layers;
• forming a metal gate structure,
• wherein forming the metal gate structure comprises forming a first portion in place of the dummy gate structure and forming a second portion that wraps around a plurality of nanostructure channels formed from the plurality of channel layers;
• and
• removing the second spacer layer to form, between the first spacer layer and the third spacer layer, a dielectric region that resides on a top surface of the first spacer layer,
• wherein removing the second spacer layer comprises using a gaseous mixture that has an accelerated reaction with the second material, relative to the first material and the third material, to perform an etch-selectivity operation that removes the second spacer layer from between the first spacer layer and the third spacer layer to form the dielectric region, and
• wherein the third spacer layer defines a sidewall of the dielectric region.

A method, comprising:

• forming, over a semiconductor substrate, a plurality of nanostructure layers comprising a plurality of sacrificial layers and a plurality of channel layers;
• forming, over the plurality of nanostructure layers, a dummy gate structure;
• forming, along a sidewall of the dummy gate structure, a plurality of spacer layers;
• removing the dummy gate structure;
• removing the plurality of sacrificial layers;
• forming a metal gate structure,
• wherein forming the metal gate structure comprises forming a first portion in place of the dummy gate structure and forming a second portion that wraps around a plurality of nanostructure channels formed from the plurality of channel layers;
• and
• removing a first spacer layer, of the plurality of spacer layers, to form a dielectric region, and
• wherein a portion of a second spacer layer, of the plurality of spacer layers, comprises a first region of diffused silicon germanium.