Semiconductor structure and method for fabricating the same
AssigneeUnited Microelectronics Corp.
InventorKai-Kuen Chang
Life of this patent
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Abstract
A semiconductor structure includes a substrate and a first switch element disposed in a first device area of the substrate. The first switch element includes a channel region, a first gate dielectric layer, a first gate layer and a source/drain region. The channel region is disposed at the bottom of a recess in the first device area. The first gate dielectric layer has a first region and a second region extending into the recess, the first region has a first thickness; the second region has a second thickness, and the first thickness is smaller than the second thickness. The first gate layer is disposed above the first gate dielectric layer. The source/drain region is disposed in the substrate and adjacent to the first gate dielectric layer.
Claims20
A semiconductor structure, comprising:
- a substrate;
- and
- a first switch element, disposed in a first device area of the substrate, comprising:
- a channel region, disposed at a bottom of a recess in the first device area;
- a first gate dielectric layer, having a first region and a second region extending into the recess;
- wherein the first region is disposed near a middle of the first device area and has a first thickness;
- the second region is disposed near a periphery of the first device area and has a second thickness;
- the first thickness is smaller than the second thickness;
- and the second thickness is greater than a depth of the recess;
- a first gate layer, disposed above the first gate dielectric layer;
- and
- a source/drain region, disposed in the substrate and adjacent to the first gate dielectric layer.
A method for fabricating a semiconductor structure, comprising:
- forming a recess in a first device area of a substrate;
- forming a channel region at a bottom of the recess;
- forming a first gate dielectric layer having a first region and a second region to extend into the recess, wherein the first region is disposed near a middle of the first device area and has a first thickness;
- the second region is disposed near a periphery of the first device area, extend upward higher than a substrate surface of the substrate and has a second thickness, the first thickness is smaller than the second thickness;
- and the second thickness is greater than a depth of the recess;
- forming a first gate layer above the first gate dielectric layer;
- and
- forming a source/drain region in the substrate and adjacent to the first gate dielectric layer.
A semiconductor structure, comprising:
- a substrate and
- a first transistor, disposed in the substrate, and comprising a first gate dielectric layer and a first gate layer, wherein the first gate dielectric layer has a first region with a first thickness and a second region with a second thickness;
- wherein the first gate layer at least partially extends downward into a recess formed in the substrate from a substrate surface of the substrate;
- and
- a second transistor, disposed in the substrate, and comprising a second gate dielectric layer with a third thickness;
- wherein the second thickness is greater than the first thickness;
- and the second thickness is greater than a depth of the recess.
Dependencies are inferred from the claim text.