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US 12,707,679 B2Granted
Shifted-channel stacked FETs
AssigneeInternational Business Machines Corporation
InventorsShay Reboh, Ruilong Xie, Julien Frougier, Junli Wang, Tenko Yamashita
Life of this patent
Estimating the term…
Abstract
Semiconductor devices includes a bottom field effect transistor (FET) over a substrate, having a bottom channel and bottom source/drain structures. A bottom plug of dielectric material penetrates the substrate and that makes contact with a channel of the bottom FET. A top FET over the bottom FET has a top channel that is laterally offset with respect to the bottom channel. Electrical contacts reach to the top FET and the bottom FET.
Claims20
A semiconductor device, comprising:
- a bottom field effect transistor (FET) over a substrate, the bottom FET having a bottom channel and bottom source/drain structures;
- a bottom plug of dielectric material that penetrates the substrate and that makes contact with the bottom channel;
- a top FET over the bottom FET, the top FET having a top channel that is laterally offset with respect to the bottom channel;
- and
- electrical contacts to the top FET and the bottom FET.
2 more elements
A semiconductor device, comprising:
- a bottom field effect transistor (FET) over a substrate, the bottom FET having a bottom channel and bottom source/drain structures, the bottom source/drain structures having a first side with a non-flat profile and a second side with a flat profile;
- a bottom plug of dielectric material that penetrates the substrate and that makes contact with the bottom channel and with the second side of the bottom source/drain structures;
- a top FET over the bottom FET, the top FET having a top channel that is laterally offset with respect to the bottom channel;
- and
- electrical contacts to the top FET and the bottom FET, including a first contact that penetrates the bottom plug to make contact with a source/drain structure of the top FET.
2 more elements
A semiconductor device, comprising:
- a bottom field effect transistor (FET) over a substrate, the bottom FET having a bottom channel and bottom source/drain structures, the bottom source/drain structures having a first side with a non-flat profile and a second side with a flat profile;
- a bottom plug of dielectric material that penetrates the substrate and that makes contact with the bottom channel and with the second side of the bottom source/drain structures;
- a top FET, over the bottom FET, the top FET having a top channel that is laterally offset with respect to the bottom channel and top source/drain structures that have a first side with a non-flat profile and a second side with a flat profile;
- a top plug of dielectric material that makes direct contact with the top channel;
- and
- electrical contacts to the top FET and the bottom FET, including a first contact that penetrates the bottom plug to make contact with a source/drain structure of the top FET.
3 more elements
Dependencies are inferred from the claim text.