High electron mobility transistor with gate electrode below the channel
AssigneeInternational Business Machines Corporation
InventorsCezar Bogdan Zota, Eunjung Cha, Thomas Morf, Peter Mueller
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Abstract
One or more systems, devices, methods of use and/or methods of fabrication provided herein relate to a high-electron-mobility transistor with a gate electrode below the channel. According to one embodiment, a device comprises a source electrode and a drain electrode coupled to a top surface of a high-electron-mobility transistor (HEMT) heterostructure, and a gate electrode located in contact with an underside of the HEMT heterostructure.
Claims19
A low noise amplifier cryogenic quantum computing device, comprising:
- a transistor structure configured to operate in a cryogenic environment, comprising:
- a source electrode and drain electrode coupled to a top surface of a high-electron-mobility transistor (HEMT) heterostructure;
- a gate electrode disposed beneath and in contact with an underside of the HEMT heterostructure, the gate electrode being encapsulated within an insulating material and electrically coupled through an encapsulated interconnect to a gate pad disposed on a top surface of the device;
- and
- wherein the HEMT heterostructure comprises:
- a first plurality of semiconductor layers;
- a contact layer adjacent to the first plurality of semiconductor layers;
- an intermediate semiconductor layer adjacent to the contact layer;
- a channel layer adjacent to the intermediate semiconductor layer;
- and
- a second plurality of semiconductor layers adjacent to the channel layer;
- and
- wherein the first plurality of semiconductor layers, the contact layer, and the channel layer are comprised of materials selected to maintain carrier mobility at cryogenic temperatures.
A method, comprising:
- coupling a source electrode and a drain electrode to a top surface of a high-electron-mobility transistor (HEMT) heterostructure;
- and
- positioning a gate electrode in contact with an underside of the HEMT heterostructure, the gate electrode being encapsulated within an insulating material and electrically coupled through an encapsulated interconnect to a gate pad disposed on a top surface of the device;
- and
- wherein the HEMT heterostructure comprises:
- a first plurality of semiconductor layers;
- a contact layer adjacent to the first plurality of semiconductor layers;
- an intermediate semiconductor layer adjacent to the contact layer;
- a channel layer adjacent to the intermediate semiconductor layer;
- and
- a second plurality of semiconductor layers adjacent to the channel layer;
- and
- wherein the first plurality of semiconductor layers, the contact layer, and the channel layer are comprised of materials selected to maintain carrier mobility at cryogenic temperatures.
A low noise amplifier cryogenic quantum computing device, comprising:
- a transistor structure comprising:
- a gate electrode;
- and
- a semiconductor structure region comprising:
- a barrier region on top of the gate electrode;
- a channel region configured to carry a current on top of the barrier region;
- a source electrode and a drain electrode located on top of the channel region;
- wherein the gate electrode is encapsulated within an insulating material and electrically coupled through an encapsulated interconnect to a gate pad disposed on a top surface of the device;
- and
- wherein the transistor structure comprises:
- a first plurality of semiconductor layers;
- a contact layer adjacent to the first plurality of semiconductor layers;
- an intermediate semiconductor layer adjacent to the contact layer;
- a channel layer adjacent to the intermediate semiconductor layer;
- and
- a second plurality of semiconductor layers adjacent to the channel layer;
- and
- wherein the first plurality of semiconductor layers, the contact layer, and the channel layer are comprised of materials selected to maintain carrier mobility at cryogenic temperatures.
Dependencies are inferred from the claim text.