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US 12,707,663 B2Granted
Semiconductor device and method of manufacturing the same
AssigneeRenesas Electronics Corporation
InventorsRyota Kuroda, Hitoshi Matsuura
Life of this patent
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Abstract
A semiconductor device includes a trench formed in an element formation region of a semiconductor substrate, an insulating film formed on an inner wall of the trench, a p-type semiconductor portion embedded in a part of the trench via the insulating film, and an n-type semiconductor portion embedded in another part of the trench via the insulating film and provided so as to contact with the p-type semiconductor portion.
Claims13
A semiconductor device comprising:
- at least one trench formed in an element formation region of a semiconductor substrate;
- an insulating film formed on an inner wall of the at least one trench;
- at least one p-type semiconductor portion embedded in a part of the at least one trench via the insulating film;
- and
- at least one n-type semiconductor portion embedded in another part of the at least one trench via the insulating film and provided so as to contact with the at least one p-type semiconductor portion,
- wherein the semiconductor substrate is a silicon substrate,
- wherein the at least one n-type semiconductor portion has:
- a first semiconductor portion into which arsenic is introduced;
- and
- a second semiconductor portion into which phosphorus is introduced, and
- wherein the first semiconductor portion is provided on and above the second semiconductor portion.
8 more elements
A method of manufacturing a semiconductor device including a trench gate type power transistor, the method comprising:
- (a) forming a gate trench in a first region of a semiconductor substrate, and forming a trench in a second region of the semiconductor substrate;
- (b) forming a gate insulating film on an inner wall of the gate trench, and forming an insulating film on an inner wall of the trench;
- (c) forming a gate electrode in the gate trench;
- (d) forming a p-type semiconductor portion in the trench;
- and
- (e) forming an n-type semiconductor portion contacting with the p-type semiconductor portion in the trench,
- wherein the trench gate type power transistor is a trench gate type IGBT,
- wherein the method comprises:
- (f) forming an emitter region of the trench gate type IGBT;
- and
- (g) forming a first plug electrically connected to the p-type semiconductor portion, and forming a second plug electrically connected to the n-type semiconductor portion,
- wherein the (e) and the (f) are performed in the same step,
- wherein the n-type semiconductor portion includes:
- a first semiconductor portion;
- and
- a second semiconductor portion, and
- wherein the (e) has:
- (e1) forming the first semiconductor portion in the same step as the (f);
- and
- (e2) forming the second semiconductor portion in the same step as the (c).
17 more elements
Dependencies are inferred from the claim text.