Method for manufacturing capacitor

A method for manufacturing a capacitor, the method comprising:

• an n-type semiconductor part forming step of
• preparing a silicon substrate which is a p-type semiconductor having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface, and
• forming an n-type semiconductor part at a boundary between the capacitance generation region and the non-capacitance generation region, the n-type semiconductor part extending from the first surface toward the second surface;
• a masking layer forming step of
• forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and
• forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;
• a porous part forming step of
• forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process, the porous part having fine pores, and
• removing the second masking part after forming the porous part;
• a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores;
• and
• a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.

A method for manufacturing a capacitor, the method comprising:

• a masking layer forming step of
• preparing a silicon substrate having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface,
• forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and
• forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;
• a porous part forming step of
• forming a backside electrode having a same shape as the capacitance generation region at a same location as the capacitance generation region on the second surface of the silicon substrate when viewed along a direction connecting the first surface and the second surface,
• forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process by using the backside electrode as an anode, the porous part having fine pores, and
• removing the second masking part after forming the porous part;
• a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores;
• and
• a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.

A method for manufacturing a capacitor, the method comprising:

• a masking layer forming step of
• preparing a silicon substrate having a first surface and a second surface opposite the first surface, the silicon substrate including a capacitance generation region and a non-capacitance generation region which is a region other than the capacitance generation region when viewed along a direction connecting the first surface and the second surface,
• forming a masking layer on the first surface of the silicon substrate, the masking layer including a first masking part covering the non-capacitance generation region and a second masking part covering the capacitance generation region, and
• forming a plurality of through holes extending through the second masking part in a thickness direction defined with respect to the second masking part;
• a low-resistance part forming step of forming a low-resistance part having a same shape as the capacitance generation region at a same location as the capacitance generation region in the silicon substrate when viewed along the direction connecting the first surface and the second surface, the low-resistance part having a lower specific resistance than the silicon substrate and extending from the second surface toward the first surface;
• a porous part forming step of
• forming a porous part in the capacitance generation region of the silicon substrate by an anodic oxidation process, the porous part having fine pores, and
• removing the second masking part after forming the porous part;
• a dielectric layer forming step of forming a dielectric layer on inner surfaces of the fine pores;
• and
• a conductor layer forming step of forming a conductor layer including a first conductive part and a second conductive part electrically connected to the first conductive part, the first conductive part being in contact with the dielectric layer, the second conductive part being in the capacitance generation region of the first surface.