Technologies for low-leakage on-chip capacitors

A device comprising:

• a capacitor, the capacitor comprising:
• a first metal layer on a substrate;
• a high-k dielectric layer adjacent the first metal layer;
• and
• a second metal layer adjacent the high-k dielectric layer;
• a first electrode comprising part of the first metal layer and part of the second metal layer;
• and
• a second electrode comprising part of the first metal layer and part of the second metal layer,
• wherein, for the first metal layer and the second metal layer, the first electrode is separated from the second electrode by at least twice a thickness of the high-k dielectric layer;
• a second capacitor, the second capacitor comprising:
• a first electrode comprising part of the first metal layer;
• and
• a second electrode comprising part of the second metal layer,
• wherein, in use, an electric field of the second capacitor is substantially perpendicular to the high-k dielectric layer;
• and
• compute circuitry, wherein the compute circuitry in a high-power mode is to use the second capacitor as a voltage support device, wherein the compute circuitry in a low-power mode is to use the capacitor as a voltage support device.

A device comprising:

• a first metal layer on a substrate;
• a high-k dielectric layer adjacent the first metal layer;
• a second metal layer on the substrate;
• means for creating a capacitor from the first metal layer, the high-k dielectric layer, and the second metal layer with an electric field substantially parallel to the high-k dielectric layer;
• and
• means for creating a second capacitor from the first metal layer, the high-k dielectric layer, and the second metal layer with an electric field substantially perpendicular to the high-k dielectric layer.