Method for forming memory device

A method, comprising:

• forming an insulating layer over a semiconductor layer;
• forming a metal electrode layer over the insulating layer, wherein the semiconductor layer, the insulating layer, and the metal electrode layer serve as a metal-insulator-semiconductor (MIS) structure;
• transferring the MIS structure to a MIS memory structure, comprising:
• supplying a voltage to the metal electrode layer, such that the MIS structure is under reverse bias and the semiconductor layer is under deep depletion regime;
• and
• stop supplying the voltage to the metal electrode layer until a local breakdown portion is formed in the insulating layer;
• performing a first write operation to the MIS memory structure by supplying a first voltage pulse to the metal electrode layer;
• performing a first read operation to the MIS memory structure by supplying a second voltage pulse to the metal electrode layer and detecting a first read current flowing through the MIS structure;
• performing a second write operation to the MIS memory structure by supplying a third voltage pulse to the metal electrode layer, wherein the first voltage pulse has a higher voltage level than the third voltage pulse;
• and
• performing a second read operation to the MIS memory structure by supplying a fourth voltage pulse to the metal electrode layer and detecting a second read current flowing through the MIS structure, wherein the first read current is different from the second read current, and wherein the third voltage pulse has a lower voltage level than the second and fourth voltage pulses.

A method, comprising:

• etching a semiconductor layer to form a fin structure protruding over the semiconductor layer;
• forming an insulating layer over the semiconductor layer and lining the fin structure;
• forming first and second metal electrode layers in contact with the insulating layer, wherein the first metal electrode layer, the insulating layer, and the fin structure serve as a first metal-insulator-semiconductor (MIS) structure, and the second metal electrode layer, the insulating layer, and the fin structure serve as a second metal-insulator-semiconductor (MIS) structure;
• transferring the first MIS structure to a first MIS memory structure by supplying a first voltage to the first metal electrode layer until a first local breakdown portion is formed in the insulating layer;
• transferring the second MIS structure to a second MIS memory structure by supplying a second voltage to the second metal electrode layer until a second local breakdown portion is formed in the insulating layer;
• performing a first write operation by supplying a first voltage pulse to the first metal electrode layer;
• performing a first read operation by supplying a second voltage pulse to the first metal electrode layer and detecting a first read current flowing through the first MIS structure;
• performing a second write operation by supplying a third voltage pulse to the first metal electrode layer, wherein the first voltage pulse has a higher voltage level than the third voltage pulse;
• and
• performing a second read operation by supplying a fourth voltage pulse to the first metal electrode layer and detecting a second read current flowing through the first MIS structure, wherein the first read current is different from the second read current, and wherein the third voltage pulse has a lower voltage level than the second and fourth voltage pulses.