DFE implementation for wireline applications

An electronic circuit comprising:

• a first adder having a first input configured to receive a first symbol of a plurality of symbols;
• a first filter circuit having a plurality of inputs and a plurality of outputs coupled to a plurality of second inputs of the first adder, wherein each input of the plurality of inputs is configured to have one of three values, and each output of the plurality of outputs is configured to provide an output that corresponds to a member of a set of possible combinations of the inputs of the first filter circuit;
• a first slicer circuit having inputs coupled to outputs of the first adder;
• a first multiplexer having inputs coupled to outputs of the first slicer circuit;
• a second adder having a first input configured to receive a second symbol of the plurality of symbols;
• a second filter circuit having a plurality of outputs coupled to a plurality of second inputs of the second adder, wherein each output of the plurality of outputs of the second filter circuit is configured to provide an output that corresponds to a member of a set of possible combinations of the inputs of the second filter circuit;
• a second slicer circuit having inputs coupled to outputs of the second adder;
• and
• a second multiplexer having inputs coupled to outputs of the second slicer circuit.