Iterative error decoding with early termination of decoding process

A system for decoding data, comprising:

• a memory device;
• and
• a processing device coupled to the memory device, the processing device to perform operations comprising:
• determining that a codeword received from the memory device has errors;
• initiating a first soft decoding process to decode embedded data from the codeword based on respective log-likelihood ratio (LLR) values of a first LLR set assigned to bits of the codeword, wherein bits identified as having a highest reliability level are assigned first LLR values of a first magnitude and bits identified as having a lowest reliability level are assigned first LLR values of a second magnitude less than the first magnitude and based on updating LLR values of the bits at each iteration of the first soft decoding process;
• incrementing an iteration counter at each iteration of the first soft decoding process;
• determining that the first soft decoding process will be unable to decode the embedded data before the iteration counter achieves a maximum iteration count based on the updated LLR values of the bits;
• terminating the first soft decoding process at an iteration count that is less than the maximum iteration count in response to the determination that the first soft decoding process will be unable to decode the embedded data;
• and
• initiating a second soft decoding process to decode the embedded data from the codeword based on respective second LLR values of a second LLR set assigned to the bits of the codeword in response to terminating the first soft decoding process, wherein bits identified as having the highest reliability level are assigned second LLR values of a third magnitude less than the first magnitude and bits identified as having the lowest reliability level are assigned second LLR values of a fourth magnitude greater than the second magnitude.

A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:

• determining that a codeword received from a memory device has errors;
• initiating a first soft decoding process to decode embedded data from the codeword based on log-likelihood ratio (LLR) values of a first LLR set assigned to bits of the codeword, wherein bits identified as having a highest reliability level are assigned first LLR values of a first magnitude and bits identified as having a lowest reliability level are assigned first LLR values of a second magnitude less than the first magnitude and based on updating LLR values of the bits at each iteration of the first soft decoding process;
• incrementing an iteration counter at each iteration of the first soft decoding process;
• determining that the first soft decoding process will be unable to decode the embedded data before the iteration counter achieves a maximum iteration count based on the updated LLR values of the bits;
• terminating the first soft decoding process at an iteration count that is less than the maximum iteration count in response to the determination that the first soft decoding process will be unable to decode the embedded data;
• and
• initiating a second soft decoding process to decode the embedded data from the codeword based on respective second LLR values of a second LLR set assigned to the bits of the codeword in response to terminating the first soft decoding process, wherein bits identified as having the highest reliability level are assigned second LLR values of a third magnitude less than the first magnitude and bits identified as having the lowest reliability level are assigned second LLR values of a fourth magnitude greater than the second magnitude.