Plasma etching apparatus and semiconductor processing system

A plasma etching apparatus comprising:

• a housing having a processing space;
• an electrostatic chuck inside the housing, the electrostatic chuck configured to support a substrate and comprising at least one lower electrode;
• at least one upper electrode facing the at least one lower electrode;
• a lower radiofrequency (RF) power source connected to the at least one lower electrode and configured to apply lower RF power of a first frequency;
• an upper RF power source connected to the at least one upper electrode and configured to supply upper RF power of the first frequency;
• a lower insulator disposed adjacently to the at least one lower electrode comprising a ring shape that surrounds the at least one lower electrode in horizontal directions, the ring shape of the lower insulator embedded with at least one lower detector;
• an upper insulator disposed adjacent to the at least one upper electrode and comprising a ring shape that surrounds the at least one upper electrode in the horizontal directions, the ring shape of the upper insulator embedded with at least one upper detector;
• and
• a controller configured to perform closed loop phase shift control on at least one from among the upper RF power source and the lower RF power source by performing a calculation that includes a lower parameter measurement value obtained by the at least one lower detector and an upper parameter measurement value obtained by the at least one upper detector,
• wherein a total number of the at least one lower electrode is equal to a total number of the at least one lower detector, and a total number of the at least one upper electrode is equal to a total number of the at least one upper detector.