Display device
AssigneeLG Display Co., Ltd.
InventorsYongmin Jeong, DongHo Choi
Life of this patent
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Abstract
A display device includes a gate driver which supplies a gate signal to pixels and includes a plurality of stages, wherein each of the stages includes a pull-down unit which outputs a first voltage applied to a first voltage line responsive to a voltage of a Q node as the gate signal, a pull-up unit which outputs a second voltage applied to a second voltage line responsive to a voltage of a QB node as the gate signal, a Q node controller which controls the voltage of the Q node responsive to a start signal and a clock signal and a QB node controller which includes a first transistor including a gate electrode connected to a clock signal line to which the clock signal is supplied and controls the voltage of the QB node responsive to the clock signal, the start signal, and the voltage of the Q node.
Claims15
A display device, comprising:
- a display panel including a plurality of pixels;
- and
- a gate driver configured to supply a gate signal to the plurality of pixels, the gate driver including a plurality of stages that each comprise:
- a pull-down circuit configured to output as the gate signal a first voltage that is applied to a first voltage line responsive to a voltage of a Q node;
- a pull-up circuit configured to output as the gate signal a second voltage that is applied to a second voltage line responsive to a voltage of a QB node;
- a Q node controller connected to the Q node, the Q node controller configured to control the voltage of the Q node responsive to a start signal and a clock signal received by the Q node controller;
- and
- a QB node controller connected to the QB node, the QB node controller including a first transistor having a gate electrode that is connected to a clock signal line that supplies the clock signal and controls the voltage of the QB node responsive to the clock signal, the start signal, and the voltage of the Q node,
- wherein the QB node controller further includes a third transistor including a gate electrode connected to a drain electrode of the first transistor at a QP node, a source electrode connected to the first voltage line, and a drain electrode connected to the QB node.
Dependencies are inferred from the claim text.