High accuracy texture filtering in computer graphics

A method of performing texture filtering in hardware logic, wherein the method performs a filtering operation involving textures values input over N clock cycles for each of a plurality of streams of texture values, where N>1, the method comprising:

• receiving, in a texture filtering unit, at least two texture values each clock cycle and a plurality of filter coefficients, the plurality of filter coefficients comprising coefficients relating to a combination of at least two of volumetric, anisotropic and trilinear texture filtering methods;
• converting the input texture values from floating-point format to a fixed-point significand and an exponent;
• generating a single composite filter coefficient for each input texture value from the plurality of filter coefficients comprising coefficients relating to a combination of at least two of volumetric, anisotropic and trilinear texture filtering methods, wherein the single composite filter coefficient is calculated independent of the input texture value;
• in each of a plurality of multipliers, multiplying the significand of one of the input texture values by its corresponding single composite filter coefficient, wherein the plurality of multipliers comprises one multiplier for each input texture value received in a clock cycle;
• adding together outputs from each of the multipliers, wherein adding together outputs from each of the multipliers comprises:
• in a first clock cycle of the N clock cycles for the stream of texture values, adding together outputs from each of the multipliers;
• in each of a second clock cycle to a Nth clock cycle of the N clock cycles for the stream of texture values, adding together outputs from each of the multipliers and a result of the addition from an immediately previous one of the N clock cycles for the stream of texture values;
• and
• outputting a result of the addition in the Nth clock cycle of the N clock cycles for the stream of texture values;
• selecting a mode and controlling operation of the addition unit, wherein the plurality of streams of texture values are interleaved such that in adjacent clock cycles, texture values are input from different streams of texture values;
• converting the result from fixed-point format to floating-point format;
• and
• outputting the converted result.

An integrated circuit manufacturing system comprising:

• a non-transitory computer readable storage medium having stored thereon a computer readable dataset description of an integrated circuit that describes a texture filtering unit;
• a layout processing system configured to process the integrated circuit description so as to generate a circuit layout description of an integrated circuit embodying the texture filtering unit;
• and
• an integrated circuit generation system configured to manufacture the texture filtering unit according to the circuit layout description,
• wherein the texture filtering unit is configured to perform a filtering operation involving texture values input over N clock cycles for each of a plurality of streams of texture values, where N>1, and the texture filtering unit comprises:
• a plurality of inputs arranged to receive at least two texture values each clock cycle and a plurality of filter coefficients, the plurality of filter coefficients comprising coefficients relating to a combination of at least two of volumetric, anisotropic and trilinear texture filtering methods;
• format conversion logic arranged to convert the input texture values from floating-point format to a fixed-point significand and an exponent;
• a coefficient merging logic block arranged to generate a single composite filter coefficient for each input texture value from the plurality of filter coefficients comprising coefficients relating to a combination of at least two of volumetric, anisotropic or trilinear texture filtering methods, wherein the single composite filter coefficient is calculated independent of the input texture value;
• one multiplier for each input texture value, wherein each multiplier is arranged to multiply the significand of one of the input texture values by its corresponding single composite filter coefficient;
• an addition unit arranged, for each of the streams of texture values:
• in a first clock cycle of the N clock cycles for the stream of texture values, to add together outputs from each of the multipliers;
• in each of a second clock cycle to a Nth clock cycle of the N clock cycles for the stream of texture values, to add together outputs from each of the multipliers and a result of the addition from an immediately previous one of the N clock cycles for the stream of texture values;
• and
• to output a result of the addition in the Nth clock cycle of the N clock cycles for the stream of texture values;
• a mode and an interleaving counter logic block arranged to control operation of the addition unit such that in adjacent clock cycles, texture values are input from different streams of texture values to interleave the plurality of streams of texture values;
• hardware logic arranged to convert an output from the addition unit from fixed-point format to floating-point format;
• and
• an output arranged to output the converted output from the addition unit.