Techniques and devices for configurable memory encryption and authentication
AssigneeCryptography Research, Inc.
InventorsAjay Kapoor, Marcel Van Loon
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Abstract
Disclosed systems and techniques involve flexible encryption, decryption, retrieval, and authentication of data. The systems may include a cryptographic processor that, in a first selectable mode of operation is configured to identify plaintext blocks, generate encrypted ciphertext blocks, process sequentially the ciphertext blocks to obtain an authentication value, encrypt the authentication value, and store the ciphertext blocks and an authentication tag, obtained based on the encrypted authentication value. In a second selectable mode, the cryptographic processor may perform ciphertext block encryption but forgo obtaining the authentication value.
Claims20
A method to store a parcel of data in a memory device at a memory address jointly associated with the parcel of data and an error correction (EC) space for the parcel of data, the method comprising:
- encrypting, by a processing device, a plurality of plaintext blocks of the parcel of data to generate a plurality of ciphertext blocks, wherein each of the plurality of ciphertext blocks is generated by encrypting a respective block of the plurality of plaintext blocks;
- processing sequentially, by the processing device, the plurality of ciphertext blocks to obtain an authentication value;
- encrypting, by the processing device, the authentication value to obtain an encrypted authentication value;
- and
- storing, in the memory device, the plurality of ciphertext blocks and a target number of bits of an authentication tag for the plurality of ciphertext blocks, wherein the authentication tag is based on the encrypted authentication value, and wherein the target number of bits is determined by a size of the EC space for the parcel of data.
A system comprising:
- a processing device;
- and
- a memory device communicatively coupled to the processing device, wherein the processing device is configured to:
- encrypt a plurality of plaintext blocks of a parcel of data to generate a plurality of ciphertext blocks, wherein each of the plurality of ciphertext blocks is generated by encrypting a respective block of the plurality of plaintext blocks;
- process sequentially the plurality of ciphertext blocks to obtain an authentication value;
- encrypt the authentication value to obtain an encrypted authentication value;
- and
- store, in the memory device at a memory address jointly associated with the parcel of data and an error correction (EC) space for the parcel of data, the plurality of ciphertext blocks and a target number of bits of an authentication tag for the plurality of ciphertext blocks, wherein the authentication tag is based on the encrypted authentication value, and wherein the target number of bits is determined by a size of the EC space for the parcel of data.
A non-transitory computer-readable memory comprising instructions that, when executed by a processing device, cause the processing device to:
- encrypt a plurality of plaintext blocks of a parcel of data to generate a plurality of ciphertext blocks, wherein each of the plurality of ciphertext blocks is generated by encrypting a respective block of the plurality of plaintext blocks;
- process sequentially the plurality of ciphertext blocks to obtain an authentication value;
- encrypt the authentication value to obtain an encrypted authentication value;
- and
- store, in a memory device at a memory address jointly associated with the parcel of data and an error correction (EC) space for the parcel of data, the plurality of ciphertext blocks and a target number of bits of an authentication tag for the plurality of ciphertext blocks, wherein the authentication tag is based on the encrypted authentication value, and wherein the target number of bits is determined by a size of the EC space for the parcel of data.
Dependencies are inferred from the claim text.