Watchpoints for debugging in a graphics environment

A method comprising:

• causing, by hardware circuitry of a processor, a watchpoint register of the hardware circuitry to be programmed with a value of a watchpoint address, the watchpoint address comprising an address of a memory location in the processor, wherein the processor comprises processing resources to perform graphics operations using a plurality of threads;
• determining, by sequence hardware circuitry of the hardware circuitry based on the watchpoint register, whether a memory access request received from a thread of the plurality of threads is requesting access to the watchpoint address;
• and
• responsive to the memory access request requesting the access to the watchpoint address:
• determining an access type of an operation that accesses the watchpoint address, wherein the access type comprises at least one of a store, load, or atomic;
• determining, based on the access type of the operation, an address comparison technique to implement to make an address comparison corresponding to the watchpoint address;
• and
• returning, by the sequencer hardware circuitry using the address comparison, an exception payload to the thread, the exception payload comprising watchpoint details corresponding to the watchpoint address and a scoreboard identifier (SBID) associated with the memory access request, wherein the SBID comprises a hardware data structure that logs and observes data dependencies of the memory access request in the processing resources, and wherein the exception payload is returned in response to the memory access request requesting the access to the watchpoint address using the access type indicated in an access type field of the watchpoint register.

A system comprising:

• a memory to store a block of data;
• and
• a processor coupled to the memory, the processor comprising:
• processing resources to perform graphics operations using a plurality of threads;
• and
• hardware circuitry coupled to the processing resources, the hardware circuitry comprising:
• a watchpoint register programmed with a value of a watchpoint address, the watchpoint address comprising an address of a memory location in the processor;
• and
• sequencer hardware circuitry to:
• determine, using the watchpoint register, whether a memory access request received from a thread of the plurality of threads is requesting access to the watchpoint address;
• and
• responsive to the memory access request requesting the access to the watchpoint address:
• determine an access type of an operation that accesses the watchpoint address, wherein the access type comprises at least one of a store, load, or atomic;
• determine, based on the access type of the operation, an address comparison technique to implement to make an address comparison corresponding to the watchpoint address;
• and
• return, using the address comparison, an exception payload to the thread, the exception payload comprising watchpoint details corresponding to the watchpoint address and a scoreboard identifier (SBID) associated with the memory access request, wherein the SBID comprises a hardware data structure that logs and observes data dependencies of the memory access request in the processing resources, and wherein the exception payload is returned in response to the memory access request requesting the access to the watchpoint address using the access type indicated in an access type field of the watchpoint register.

A non-transitory computer-readable storage medium having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:

• causing, by hardware circuitry of a processor of the one or more processors, a watchpoint register of the hardware circuitry to be programmed with a value of a watchpoint address, the watchpoint address comprising an address of a memory location in the processor, wherein the processor comprises processing resources to perform graphics operations using a plurality of threads;
• determining, by sequencer hardware circuitry of the hardware circuitry based on the watchpoint register, whether a memory access request received from a thread of the plurality of threads is requesting access to the watchpoint address;
• and
• responsive to the memory access request requesting the access to the watchpoint address:
• determining an access type of an operation that accesses the watchpoint address, wherein the access type comprises at least one of a store, load, or atomic;
• determining, based on the access type of the operation, an address comparison technique to implement to make an address comparison corresponding to the watchpoint address;
• and
• returning, by the sequencer hardware circuitry using the address comparison, an exception payload to the thread, the exception payload comprising watchpoint details corresponding to the watchpoint address and a scoreboard identifier (SBID) associated with the memory access request, wherein the SBID comprises a hardware data structure that logs and observes data dependencies of the memory access request in the processing resources, and wherein the exception payload is returned in response to the memory access request requesting the access to the watchpoint address using the access type indicated in an access type field of the watchpoint register.