Apparatuses, systems, and methods for mode register page access modes
AssigneeMicron Technology, Inc.
InventorsRandall J. Rooney, David R. Brown
Life of this patent
Estimating the term…
Abstract
Embodiments disclosed herein provide techniques for entering, remaining, and exiting a mode register page access (MRPA) mode in a semiconductor device (e.g., a memory device). A command is used to cause the memory device to enter the MRPA mode when accessing the mode register, and a subsequent command is used to cause the memory device to remain in the MRPA mode for continued access to the mode register. While in the MRPA mode, subsequent commands enable the memory device to be accessed using a mode register address for a read command, or a mode register address and an operation code (OP code) for a write command.
Claims23
An apparatus, comprising:
- external terminals configured to receive a plurality of commands associated with an operation, the operation comprising a mode register read operation or a mode register write operation;
- and
- one or more mode registers each configured to perform the operation, wherein:
- a first command in the plurality of commands causes the apparatus to enter a mode register page access mode to enable the one or more registers to be accessed as a page, the first command providing a mode register page address and a mode register address in the mode register page to access;
- and
- a second command in the plurality of commands causes the apparatus to remain in the mode register page access mode and provides a subsequent mode register address in the mode register page to access.
A method, comprising:
- receiving a first command to perform a first operation of a first type, the first type comprising a mode register read operation or a mode register write operation;
- based on the first command, causing a mode register to enter a mode register page access mode;
- receiving a second command to perform a second operation of the first type;
- and
- based on the second command, causing the mode register to remain in the mode register page access mode,
- wherein:
- the first command provides a mode register page address and a first mode register address in the mode register page to access;
- and
- the second command provides a second mode register address in the mode register page to access.
A controller configured to transmit commands to a memory device, the commands comprising:
- a first command to cause the memory device to enter a mode register page access mode;
- and
- a second command to cause the memory device to remain in the mode register page access mode,
- wherein:
- the first command comprises a first set of bits:
- at least one bit in the first set of bits causes the memory device to enter the mode register page access mode;
- a first portion of the first set of bits provides a mode register page address;
- a second portion of the first set of bits provides a mode register address in the mode register page to access;
- the second command comprises a second set of bits:
- at least one bit in the second set of bits causes the memory device to remain in the mode register page access mode;
- and
- a third portion of the second set of bits provides a mode register address in the mode register page to access.
Dependencies are inferred from the claim text.