Memory device, method of calibrating signal level thereof, and memory system having the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoungdo Um, Jaewoo Park, Younghoon Son, Youngdon Choi, Junghwan Choi
Life of this patent
Estimating the term…
Abstract
A method of calibrating a signal level of a memory device includes performing pull-up code and pull-down code calibrations, using a ZQ calibration for non-return-to-zero (NRZ) signaling, performing a most significant bit (MSB) code calibration, using an MSB additional driver for pulse amplitude modulation level-4 (PAM4) signaling, and performing a least significant bit (LSB) code calibration using an LSB additional driver for the PAM4 signaling.
Claims17
A memory device comprising:
- a transceiver configured to receive or transmit data in a manner selected from a first signaling or a second signaling through a data channel;
- and
- a ratio of level separation mismatch (RLM) controller configured to;
- maintain at least two gaps between signal levels of the second signaling to be identical to each other when transferring data from the transceiver to an external device,
- perform pull-up code and pull-down code calibrations using a ZQ calibration for the first signaling,
- perform an additional most significant bit (MSB) code calibration using an MSB additional driver connected to a first node for the second signaling, and
- perform an additional least significant bit (LSB) code calibration using an LSB additional driver connected to the first node for the second signaling.
A memory system comprising:
- at least one memory device;
- and
- a controller configured to control the at least one memory device,
- wherein the at least one memory device includes:
- a first transceiver configured to receive or transmit data in a manner selected from a first signaling or a second signaling through a data channel;
- and
- a first ratio of level separation mismatch (RLM) controller configured to:
- maintain at least two gaps between signal levels of the second signaling to be identical to each other when transferring data from the first transceiver to the controller,
- perform pull-up code and pull-down code calibrations using a ZQ calibration for the first signaling,
- perform an additional most significant bit (MSB) code calibration using an MSB additional driver connected to a first node for the second signaling, and
- perform an additional least significant bit (LSB) code calibration using an LSB additional driver connected to the first node for the second signaling.
An operating method of a memory device, the method comprising:
- transmitting data to a controller using one of a first signaling and a second signaling through a data channel;
- maintaining at least two gaps between signal levels of the second signaling to be identical to each other during the transmitting data;
- performing an additional most significant bit (MSB) code calibration, using an MSB additional driver connected to a first node for the second signaling;
- and
- performing an additional least significant bit (LSB) code calibration using an LSB additional driver connected to the first node for the second signaling.
Dependencies are inferred from the claim text.