Optical multi-chip interconnect bridge architecture and fabrication processes

A system-in-package (SiP) fabricated using photolithography, the SiP comprising an electronic integrated circuit (EIC) layer and photonic integrated circuit (PIC) layer that is underneath the EIC layer:

• a package substrate on which the PIC layer comprising an optical multi-chip interconnect bridge (OMIB) is disposed;
• an optically-enabled bridge comprising the OMIB and implemented in the PIC layer, the optically-enabled bridge supporting an optical chip-to-chip (oC2C) interface to each of a plurality of dies in the EIC layer, the optically-enabled bridge including a plurality of optical devices that are coupled to a photonic network comprising a plurality of photonic paths in the optically-enabled bridge, the photonic network being configured to provide inter-chip optical communications among the plurality of dies, including photonic paths that support inter-die optical communications between edge-adjacent dies and between corner-adjacent dies in an array of the dies;
• and
• an analog/mixed signal (AMS) block located in the EIC layer, in which the AMS block is coupled to an optical device in the optically-enabled bridge to provide an oC2C interconnect to a die in the EIC layer, wherein
• the optically-enabled bridge is a reticle-stitched PIC OMIB, in which a plurality of photolithography reticles are used to expose respective OMIB segments of the optically-enabled bridge during photolithography, and wherein,
• the OMIB segments are stitched along at least one stitch boundary to form the reticle-stitched OMIB, the stitching including waveguide reticle stitching of photonic network waveguides crossing the stitch boundary.