Integrated circuit packages and methods
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-Hsiu Chen, Chia-Fang Tsai, Ming-Yun Liao, Yu-Chian Chiang
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Abstract
An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die having a first substrate and a first through via extending through the first substrate, a first gap-fill layer along a sidewall of the first substrate, an isolation layer on a surface of the first substrate and a surface of the first gap-fill layer, a first bonding layer over the isolation layer, and a first bonding pad in the first bonding layer. The isolation layer may overlap an interface between the sidewall of the first substrate and a sidewall of the first gap-fill layer, and may extend on sidewalls of the first through via.
Claims20
An integrated circuit package, comprising:
- a first die, wherein the first die comprises a first substrate and a first through via extending through the first substrate;
- a first gap-fill layer along a sidewall of the first substrate;
- an isolation layer on a surface of the first substrate and a surface of the first gap-fill layer, wherein the isolation layer overlaps an interface between the sidewall of the first substrate and a sidewall of the first gap-fill layer, and wherein the isolation layer extends on sidewalls of the first through via;
- a first bonding layer over the isolation layer;
- and
- a first bonding pad in the first bonding layer.
An integrated circuit package, comprising:
- a first die, wherein the first die comprises a first substrate and a first through via protruding from a top surface of the first substrate;
- a first gap-fill layer around the first die, wherein a coefficient of thermal expansion of the first gap-fill layer is different from a coefficient of thermal expansion of the first substrate;
- an isolation layer in contact with the top surface of the first substrate and a top surface of the first gap-fill layer, wherein the isolation layer overlaps an interface between the first substrate and the first gap-fill layer, and wherein the first through via extends through the isolation layer;
- a first bonding layer on the isolation layer;
- a first bonding pad in the first bonding layer;
- and
- a second die, wherein the second die comprises a second bonding layer and a second bonding pad in the second bonding layer, wherein the second bonding layer is bonded to the first bonding layer, and wherein the second bonding pad is bonded to the first bonding pad.
A method of forming an integrated circuit package, the method comprising:
- attaching a first die to a carrier, wherein the first die comprises a first substrate and a first through via in the first substrate;
- forming a first gap-fill layer on sidewalls of the first die, wherein the first gap-fill layer comprises a dielectric material;
- removing a portion of the first gap-fill layer and a portion of the first substrate to expose the first through via;
- forming an isolation layer on the first substrate and the first gap-fill layer, wherein the isolation layer overlaps an interface between the first substrate and the first gap-fill layer, and wherein the first through via extends into the isolation layer;
- forming a first bonding layer over the isolation layer;
- and
- forming a first bonding pad in the first bonding layer, wherein the first bonding pad is in contact with the first through via.
Dependencies are inferred from the claim text.