Chip package with embedded and shielded inductors
AssigneeAdvanced Micro Devices, Inc.
InventorsRobert Grant Spurney, Sri Ranga Sai Boyapati
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AssigneeAdvanced Micro Devices, Inc.
InventorsRobert Grant Spurney, Sri Ranga Sai Boyapati
Estimating the term…
Disclosed herein are a package substrate, a chip package, and method for fabricating the same. The package substrate includes a package core comprising vias; a plurality of build-up layers disposed on an upper surface of the package core, the plurality of build-up layers comprising metal traces connected with the vias; and a magnetic core inductor disposed in a cavity of the package core. The magnetic core inductor includes a magnetic inlay, and a first metal layer disposed in the cavity on the magnetic inlay below the plurality of build-up layers. A second metal layer may be further disposed between the first metal layer and the metal traces. Both the first and second metal layers may be floating or grounded. The first and second metal layers are configured to shield other electronic components from being interfered by the magnetic field generated by the magnetic core inductor.
A package substrate of a chip package, comprising a package core comprising vias;
A chip package comprising:
A method of embedding a magnetic core inductor in a package substrate, the method comprising:
Dependencies are inferred from the claim text.