Semiconductor device and method of fabricating the same

A semiconductor device, comprising:

• a substrate including a cell disposing region and a block border region;
• an active pattern on the cell disposing region;
• channel patterns and source/drain patterns on the active pattern;
• gate electrodes on the channel patterns, respectively, the gate electrodes extending from the cell disposing region to the block border region;
• and
• a connection structure on the block border region,
• wherein the connection structure is configured to physically connect the gate electrodes to each other,
• the connection structure comprises a rounded inner side surface and a rounded outer side surface, and
• a curvature radius of the rounded outer side surface is larger than a curvature radius of the rounded inner side surface.

A semiconductor device, comprising:

• a substrate including a cell disposing region and a block border region, the cell disposing region comprising a PMOSFET region and an NMOSFET region;
• a first active pattern on the PMOSFET region and a second active pattern on the NMOSFET region;
• a first channel pattern and a first source/drain pattern on the first active pattern;
• a second channel pattern and a second source/drain pattern on the second active pattern;
• a gate electrode extending in a first direction to cross the first channel pattern and the second channel pattern;
• a connection structure on the block border region;
• a gate insulating layer interposed between the gate electrode and the first channel pattern and the second channel pattern;
• gate spacers on opposite side surfaces of the gate electrode, respectively;
• a gate capping pattern on a top surface of the gate electrode;
• a gate cutting pattern penetrating the gate electrode;
• a gate contact electrically connected to the gate electrode;
• an active contact electrically connected to at least one of the first source/drain pattern and the second source/drain pattern;
• a first metal layer on the gate contact and the active contact, the first metal layer comprising first interconnection lines, the first interconnection lines connected to the gate contact and the active contact, respectively;
• and
• a second metal layer on the first metal layer,
• wherein the second metal layer comprises second interconnection lines, the second interconnection lines electrically connected to the first interconnection lines,
• the gate electrode comprises a first gate electrode and a second gate electrode, which are adjacent to each other,
• the connection structure is configured to physically connect the first gate electrode and the second gate electrode to each other,
• the connection structure comprises a rounded inner side surface and a rounded outer side surface, and
• the gate spacers extend along the first gate electrode and the second gate electrode and are on the rounded outer side surface and the rounded inner side surface, respectively.