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US 12,701,762 B2Granted
Carbon-containing cap layer for doped semiconductor epitaxial layer
AssigneeApplied Materials, Inc.
InventorsJason Jewell, Abhishek Dube
Life of this patent
Estimating the term…
Abstract
A semiconductor structure includes a stack of alternating doped semiconductor epitaxial layers and cap epitaxial layers formed on a substrate. Each doped semiconductor epitaxial layer includes silicon having carrier dopants, and each cap epitaxial layer includes silicon and carbon un-doped with carrier dopants.
Claims16
A method of forming a doped semiconductor layer in a semiconductor structure, comprising:
- performing a plurality of cycles of a first deposition process, a second deposition process subsequent to the first deposition process, and an etch process,
- the first deposition process forming a doped semiconductor layer on an exposed surface of a substrate, the substrate comprising a semiconductor region and a dielectric region, wherein an epitaxial portion of the doped semiconductor layer is selectively formed on a surface of the semiconductor region, and an amorphous portion of the doped semiconductor layer is selectively formed on a surface of the dielectric region;
- the second deposition process forming a cap layer on the doped semiconductor layer, wherein an epitaxial portion of the cap layer is selectively formed on a surface of the epitaxial portion of the doped semiconductor layer, and an amorphous portion of the cap layer is selectively formed on a surface of the amorphous portion of the doped semiconductor layer;
- and
- the etch process selectively removing the amorphous portion of the cap layer and the amorphous portion of the doped semiconductor layer, and leaving the epitaxial portion of the cap layer and the epitaxial portion of the doped semiconductor layer, wherein
- the doped semiconductor layer comprises silicon having carrier dopants, and
- the cap layer comprises carbon not doped with carrier dopants.
4 more elements
A processing system, comprising:
- a processing chamber;
- and
- a system controller configured to cause the processing system to:
- perform a plurality of cycles of a first deposition process, a second deposition process subsequent to the first deposition process, and an etch process,
- the first deposition process forming a doped semiconductor layer on an exposed surface of a substrate, the substrate comprising a semiconductor region and a dielectric region, wherein an epitaxial portion of the doped semiconductor layer is selectively formed on a surface of the semiconductor region, and an amorphous portion of the doped semiconductor layer is selectively formed on a surface of the dielectric region;
- the second deposition process forming a cap layer on the doped semiconductor layer, wherein an epitaxial portion of the cap layer is selectively formed on a surface of the epitaxial portion of the doped semiconductor layer, and an amorphous portion of the cap layer is selectively formed on a surface of the amorphous portion of the doped semiconductor layer;
- and
- the etch process selectively removing the amorphous portion of the cap layer and the amorphous portion of the doped semiconductor layer, and leaving the epitaxial portion of the cap layer and the epitaxial portion of the doped semiconductor layer, wherein
- the doped semiconductor layer comprises silicon having carrier dopants, and
- the cap layer comprises carbon not doped with carrier dopants.
7 more elements
Dependencies are inferred from the claim text.