Transistor, fabrication method thereof, and display apparatus comprising the same
AssigneeLG Display Co., Ltd.
InventorJaehyun Kim
Life of this patent
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Abstract
A transistor, a fabricating method of the transistor, and a display apparatus comprising the transistor are provided. The transistor comprises a first electrode, nanorod on the first electrode, an active layer on the nanorod, a gate insulating layer on the active layer, a gate electrode on the active layer, and a second electrode connected to the active layer and disposed spaced apart from the first electrode, the first electrode has a pattern area, the nanorod is disposed on the pattern area, the nanorod has a diameter and height, the height of the nanorod is larger than the diameter of the nanorod, the active layer is disposed on a side surface of the nanorod, and connected to the first electrode.
Claims19
A transistor comprising:
- a first electrode;
- a nanorod on the first electrode;
- an active layer on the nanorod;
- a gate insulating layer on the active layer;
- a gate electrode on the gate insulating layer;
- a second electrode connected to the active layer and disposed spaced apart from the first electrode;
- and
- a first insulating layer disposed on a part of the first electrode, wherein:
- the first electrode has a pattern area,
- the nanorod is disposed on the pattern area,
- the nanorod has a diameter and a height, the height of the nanorod is greater than the diameter of the nanorod,
- the active layer is disposed on a side surface of the nanorod, and connected to the first electrode,
- the active layer is disposed between the nanorod and the first insulating layer, and
- the first electrode and the first insulating layer do not overlap each other in the pattern area.
A display apparatus comprising:
- a first transistor having at least one of sub-transistor;
- a second transistor that is electrically connected to the first transistor and has a plurality of sub-transistors;
- and
- a light emitting device connected to the second transistor;
- wherein each of the sub-transistors comprises:
- a first electrode;
- a nanorod on the first electrode;
- an active layer on the nanorod;
- a gate insulating layer on the active layer;
- a gate electrode on the gate insulating layer;
- a second electrode connected to the active layer, and disposed spaced apart from the first electrode;
- and
- a first insulating layer disposed on a part of the first electrode, wherein:
- the first electrode has a pattern area,
- the nanorod is disposed on the pattern area,
- the active layer is disposed on a side surface of the nanorod, and connected to the first electrode,
- the active layer is disposed between the nanorod and the first insulating layer, and
- the first electrode and the first insulating layer do not overlap each other in the pattern area.
Dependencies are inferred from the claim text.