Semiconductor device and manufacturing method of semiconductor device

A semiconductor device comprising:

• a semiconductor layer having a first main surface and a second main surface and divided into an active region, an outer peripheral region, and an intermediate region, the outer peripheral region extending around a periphery of the active region, the intermediate region located between the active region and the outer peripheral region and extending around the periphery of the active region;
• and
• a trench gate, wherein
• the semiconductor layer includes:
• a drift region of a first conductivity type located in the active region, the intermediate region and the outer peripheral region;
• a body region of a second conductivity type located in the active region and the intermediate region and disposed above the drift region;
• a source region of the first conductivity type located in the active region and the intermediate region and disposed above the body region;
• a first contact region of the second conductivity type located in the active region, reaching the body region beyond the source region, and having a higher concentration of second conductivity-type impurities than the body region;
• and
• a second contact region of the second conductivity type located in the intermediate region, reaching the body region beyond the source region, extending around the source region along a peripheral edge of the source region, and having a higher concentration of the second conductivity-type impurities than the body region,
• the trench gate is located in the active region and extends from the first main surface beyond the source region and the body region,
• concentration distributions of the second conductivity-type impurities in a depth direction of the first contact region and the second contact region match with each other,
• the second contact region occupies a half or more range of the intermediate region in a direction connecting the active region and the outer peripheral region,
• the semiconductor layer further includes a plurality of guard rings of the second conductivity type located in the outer peripheral region and extending around the periphery of the active region and a periphery of the intermediate region, and
• the second contact region is in contact with an innermost guard ring in the plurality of guard rings.

A semiconductor device comprising:

• a semiconductor layer having a first main surface and a second main surface and divided into an active region, an outer peripheral region, and an intermediate region, the outer peripheral region extending around a periphery of the active region, the intermediate region located between the active region and the outer peripheral region and extending around the periphery of the active region;
• and
• a trench gate, wherein
• the semiconductor layer includes:
• a drift region of a first conductivity type located in the active region, the intermediate region and the outer peripheral region;
• a body region of a second conductivity type located in the active region and the intermediate region and disposed above the drift region;
• a source region of the first conductivity type located in the active region and the intermediate region and disposed above the body region;
• a first contact region of the second conductivity type located in the active region,
• reaching the body region beyond the source region, and having a higher concentration of second conductivity-type impurities than the body region;
• and
• a second contact region of the second conductivity type located in the intermediate region, reaching the body region beyond the source region, extending around the source region along a peripheral edge of the source region, and having a higher concentration of the second conductivity-type impurities than the body region,
• the trench gate is located in the active region and extends from the first main surface beyond the source region and the body region,
• concentration distributions of the second conductivity-type impurities in a depth direction of the first contact region and the second contact region match with each other,
• the second contact region occupies a half or more range of the intermediate region in a direction connecting the active region and the outer peripheral region,
• the first contact region includes a silicide layer disposed at a position in contact with a source electrode disposed on the first main surface of the semiconductor layer, and
• the concentration distribution of the second conductivity-type impurities of the first contact region has a maximum concentration in a vicinity of a bottom surface of the silicide layer.