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US 12,701,738 B2Granted
Lateral fin field-effect transistors
AssigneeTexas Instruments Incorporated
InventorManoj Mehrotra
Life of this patent
Estimating the term…
Abstract
In a described example, an integrated circuit includes a substrate of a semiconductor material, a source region, a gate region, a drain region and a fin structure formed on the substrate. The fin structure includes the gate region, the source region and a drift region between the gate region and the drain region. A doped control layer is formed along at least one sidewall of the fin structure over the drift region.
Claims26
An integrated circuit (IC) comprising:
- a substrate of a semiconductor material having a top surface;
- a fin transistor comprising:
- a gate region;
- a source region including a source tap;
- a channel region formed between the gate and source regions;
- a drain region including a drain tap;
- a fin structure formed on or over the substrate, the fin structure including the gate region, the source region and a drift region between the channel region and the drain region, the source tap and drain tap spaced apart along the fin laterally with respect to the top surface;
- and
- a doped control layer formed along at least one sidewall of the fin structure over the drift region.
6 more elements
An integrated circuit (IC) comprising:
- a fin structure formed on a semiconductor substrate, the fin structure includes a fin transistor comprising:
- a source region formed in the fin structure;
- a drain region formed in the fin structure;
- a gate region formed in the fin structure between the source and drain regions;
- a channel region formed in the fin structure between the gate and source regions;
- a drift region formed in the fin structure between the channel and drain regions;
- and
- a buried doped layer that extends through the substrate beneath a first end of the fin structure and terminates in a distal end beneath an intermediate portion the fin structure located between the first end and a second end of the fin structure.
5 more elements
A method of making an integrated circuit (IC), comprising:
- forming a fin structure having respective ends laterally spaced apart along a longitudinal fin axis over a semiconductor substrate;
- forming a drift region in the fin structure extending between the respective ends of the fin structure between a channel region and a drain region of the fin structure;
- forming a doped control layer adjacent the drift region, the doped control layer extending over and/or beneath at least at least a portion of drift region;
- and
- forming a buried doped layer in the substrate extending beneath at least a portion of the drift region.
2 more elements
An integrated circuit (IC) comprising:
- a semiconductor fin having a first conductivity type extending laterally along a longitudinal fin axis over a surface of a substrate between a source end and a drain end and having opposing sidewalls;
- a drift region in the fin having the first conductivity type and extending between the source end and the drain end between the opposing sides;
- a body region having an opposite second conductivity type between the source end and the drift region;
- and
- a gate electrode extending along a sidewall of the fin adjacent the body region.
2 more elements
A method of making an integrated circuit (IC), comprising:
- forming a fin structure having respective ends laterally spaced apart over a semiconductor substrate;
- forming a drift region in the fin structure extending between the respective ends of the fin structure between a channel region and a drain region of the fin structure;
- forming, adjacent the drift region, a doped control region along at least one sidewall of the fin structure over the drift region, the doped control region extending over and/or beneath at least at least a portion of drift region;
- and
- forming a buried doped layer in the substrate extending beneath at least a portion of the drift region.
2 more elements
Dependencies are inferred from the claim text.