Semiconductor device and method for manufacturing the same
AssigneeThe Hong Kong University of Science and Technology
InventorsJing Chen, Zheyang Zheng, Li Zhang
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Abstract
A semiconductor device includes a buffer layer, a barrier layer, a nitride-based semiconductor layer, an isolation layer, and a gate electrode. The barrier layer is disposed on the buffer layer. The nitride-based semiconductor layer is disposed on the barrier layer and has a channel region and a doped region abutting against each other. The isolation layer covers the nitride-based semiconductor layer. The isolation layer and doped channel region can exhibit a type-II energy band alignment (staggered gate stack). The gate electrode is disposed over the isolation layer and the nitride-based semiconductor layer.
Claims18
A semiconductor device, comprising:
- a buffer layer;
- a barrier layer disposed on the buffer layer;
- a nitride-based semiconductor layer disposed on the barrier layer and having a channel region and a doped region abutting against each other, wherein the nitride-based semiconductor layer further has an oxide region over the channel region, and wherein the nitride-based semiconductor layer has a bandgap less than a bandgap of the barrier layer, which forms a heterojunction therebetween, thereby generating a two-dimensional hole gas (2DHG) region adjacent to the heterojunction and thus forming a gallium nitride (GaN) buried-channel p-field-effect transistor (p-FET);
- an isolation layer covering the nitride-based semiconductor layer, wherein the isolation layer covers the oxide region of the nitride-based semiconductor layer, and wherein the channel region is configured to act as a buried channel located between the oxide region of the nitride-based semiconductor layer and the barrier layer;
- a gate electrode disposed over the isolation layer of the nitride-based semiconductor layer, wherein the gate electrode is disposed over the oxide region of the nitride-based semiconductor layer, and a portion of the isolation layer and the oxide region of the nitride-based semiconductor layer collectively form a staggered gate stack between the barrier layer and the gate electrode;
- and
- a source electrode and a drain electrode disposed over the nitride-based semiconductor layer and at opposite sides of the gate electrode.
A method for manufacturing a semiconductor device, comprising:
- forming a buffer layer on a substrate;
- forming a barrier layer on the buffer layer;
- forming a nitride-based semiconductor layer on the barrier layer, wherein the nitride-based semiconductor layer has a channel region and a doped region abutting against each other, and wherein the nitride-based semiconductor layer has a bandgap less than a bandgap of the barrier layer to form a heterojunction therebetween;
- forming a recessed region in the nitride-based semiconductor layer and forming a buried channel corresponding to the channel region in the nitride-based semiconductor layer;
- forming an oxide region over the buried channel in the nitride-based semiconductor layer such that the buried channel is located between the oxide region of the nitride-based semiconductor layer and the barrier layer;
- forming an isolation layer covering the nitride-based semiconductor layer and the oxide region of the nitride-based semiconductor layer;
- forming a gate electrode over the isolation layer and over the oxide region of the nitride-based semiconductor layer;
- and
- forming a source electrode and a drain electrode that directly contact the nitride-based semiconductor layer at opposite sides of the gate electrode.
Dependencies are inferred from the claim text.