Semiconductor device and method for fabricating the same

Abstract

A semiconductor device including highly integrated memory cells and a method for fabricating the same in which the method includes: forming a semiconductor layer pattern over a lower structure; forming a gate dielectric layer covering the semiconductor layer pattern; forming a conductive layer surrounding the semiconductor layer pattern over the gate dielectric layer; forming a pair of horizontal conductive layer patterns respectively disposed over an upper surface and a lower surface of the semiconductor layer pattern by selectively etching the conductive layer; forming a horizontal layer having a side portion between the pair of horizontal conductive layer patterns by selectively recessing the semiconductor layer pattern; and forming a pair of horizontal conductive lines respectively disposed over an upper surface and a lower surface of the horizontal layer by recessing the pair of horizontal conductive layer patterns.

Dependencies are inferred from the claim text.