Printed circuit board

A printed circuit board comprising:

• a first insulating portion including a plurality of first insulating layers, and a plurality of cavities respectively penetrating a portion of the plurality of first insulating layers;
• a first integrated circuit chip mounted in one cavity, among the plurality of cavities, the first integrated circuit chip including a demultiplexer (DEMUX) circuit;
• a second integrated circuit chip mounted in another cavity, among the plurality of cavities, the second integrated circuit chip including a multiplexer (MUX) circuit;
• a second insulating portion disposed across a portion of the first integrated circuit chip and a portion of the second integrated circuit chip;
• and
• a first wiring portion disposed on or in the second insulating portion, the first wiring portion connecting the first integrated circuit chip and the second integrated circuit chip to each other,
• wherein the first wiring portion includes a plurality of first wirings, and
• at least one wiring, among the plurality of first wirings, is open, or at least two wirings, among the plurality of first wirings, are shorted to each other, such that the open or shorted wirings do not serve as a path between the first integrated circuit chip and the second integrated circuit chip.

A printed circuit board comprising:

• a first insulating portion including a plurality of first insulating layers, and a plurality of cavities respectively penetrating a portion of the plurality of first insulating layers;
• a first integrated circuit chip disposed in one cavity, among the plurality of cavities;
• a second integrated circuit chip disposed in another cavity, among the plurality of cavities;
• a second insulating portion disposed across a portion of the first integrated circuit chip and a portion of the second integrated circuit chip;
• and
• a wiring portion disposed on or in the second insulating portion, the wiring portion including a plurality of wirings to connect the first integrated circuit chip and the second integrated circuit chip to each other,
• wherein signal transmission between the first integrated circuit chip and the second integrated circuit chip is performed by bypassing a defective wiring among the plurality of wirings to a dummy wiring among the plurality of wirings through lane shifting.