Baudrate tracking with a cost function engine for pattern detection

A wireless network device, comprising:

• a processing unit;
• and
• a read circuit, wherein the read circuit comprises:
• an RF circuit to receive incoming data and create a plurality of data samples per data bit, each having a certain phase, wherein a number of data samples created per data bit is referred to as an oversample rate (OSR) and wherein data samples that are separated by (OSR-1) samples are referred to as a phase of the data bits and wherein there are OSR phases of the data bits;
• a synchronization pattern detector to detect a synchronization pattern from a plurality of received data samples,
• wherein the synchronization pattern detector comprises:
• a plurality of cost function engines arranged in an array of rows and columns, wherein the rows of the array are associated with a particular phase of the data bits and columns of the array are associated with time;
• wherein each cost function engine processes a predetermined number of data samples which all belong to one phase and produces a partial cost value;
• a shift register associated with each cost function engine to store at least three values, wherein one value is referred to as a current partial cost value, values that are stored prior to the current partial cost value are referred to as previous partial cost values, and values that are stored after the current partial cost value are referred to as future partial cost values, wherein there is at least one previous partial cost value, one current partial cost value and at least one future partial cost value;
• a plurality of summing circuits, each having an input from a shift register associated with a cost function engine in each column so as to create a total cost associated with a symbol stream;
• and
• a comparator to compare an output from each summing circuit to a predetermined threshold to determine whether the synchronization pattern has been detected.