Reference clock switching in phase-locked loop circuits

A method, comprising:

• generating, by a multiplex circuit, a reference clock signal based on a first clock signal or based on a second clock signal;
• generating, by a clock generator circuit from the reference clock signal, an output clock signal using a phase-locking mode;
• receiving, by the clock generator circuit, an indication that the multiplex circuit has transitioned from generating the reference clock signal based on the first clock signal to generating the reference clock signal based on the second clock signal;
• and
• in response to the indication, transitioning, by the clock generator circuit, from using the phase-locking mode to using a frequency acquisition mode;
• and
• adjusting, by the clock generator circuit, a frequency of the output clock signal based on a frequency difference between the reference clock signal and the output clock signal, the clock generator circuit being in the frequency acquisition mode.

An apparatus, comprising:

• a first device that includes a transmitter circuit, the transmitter circuit configured to transmit one or more signals via a communication link;
• and
• a second device that includes a receiver circuit, the receiver circuit configured to receive the one or more signals via the communication link, wherein the receiver circuit includes:
• a multiplex circuit configured to generate a reference clock signal based on a first clock signal or based on a second clock signal;
• and
• a clock generator circuit configured to:
• generate, from the reference clock signal, an output clock signal using a phase-locking mode;
• receive an indication that the multiplex circuit has transitioned from generating the reference clock signal based on the first clock signal to generating the reference clock signal based on the second clock signal;
• and
• in response to the indication, transition from using the phase-locking mode to using a frequency acquisition mode in which the clock generator circuit is configured to adjust a frequency of the output clock signal based on a frequency difference between the reference clock signal and the output clock signal.