Phase-locked loop
Assigneeams-OSRAM AG
InventorsNiko Bako, Gregor Schatzberger, Ivan Brezovec
Life of this patent
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Abstract
A phase-locked loop circuit comprises an analog part, an integral part, and a voltage controlled oscillator configured to receive a first current signal from the analog part and a second current signal from the integral part, and to output an output clock. The integral part is configured to receive a first and a second update signal each having at least one state based on a phase difference between an input clock and the output clock. The integral part comprises three integrator cells interconnected to form a ring oscillator.
Claims16
A phase-locked loop circuit, comprising:
- an analog part;
- an integral part;
- and
- a voltage controlled oscillator configured to receive a first current signal from the analog part and a second current signal from the integral part, and to output an output clock;
- the integral part being configured to receive a first and a second update signal each having at least one state based on a phase difference between an input clock and the output clock, the integral part comprising three integrator cells interconnected to form a ring oscillator.
An integrated circuit, comprising:
- a phase-locked loop circuit comprising:
- an analog part;
- an integral part;
- and
- a voltage controlled oscillator configured to receive a first current signal from the analog part and a second current signal from the integral part, and to output an output clock;
- the integral part being configured to receive a first and a second update signal each having at least one state based on a phase difference between an input clock and the output clock, the integral part comprising three integrator cells interconnected to form a ring oscillator.
An electronic device, comprising:
- a phase-locked loop circuit comprising:
- an analog part;
- an integral part;
- and
- a voltage controlled oscillator configured to receive a first current signal from the analog part and a second current signal from the integral part, and to output an output clock;
- the integral part being configured to receive a first and a second update signal each having at least one state based on a phase difference between an input clock and the output clock, the integral part comprising three integrator cells interconnected to form a ring oscillator.
Dependencies are inferred from the claim text.