Enhancement of linearity for digitally controlled delay line

A digitally controlled delay device, the device comprising:

• a plurality of first delay stages connected in series between a first input port and a first output port;
• a plurality of second delay stages connected in series between a second input port and a second output port, wherein each first delay stage of the plurality of first delay stages includes a plurality of first delay elements and each second delay stage of the plurality of second delay stages includes a corresponding plurality of second delay elements;
• and
• a controller configured to perform complementary control of the plurality of first delay elements in one of the plurality of first delay stages and the plurality of second delay elements in one of the plurality of second delay stages based on a digital control signal, wherein the digital control signal is not an input signal of each of the plurality of first delay stages and the plurality of second delay stages, the complementary control refers to controlling one or more of the plurality of first delay elements specified by the digital control signal to be in a first control state and controlling a corresponding one or more of the plurality of second delay elements to be in a second control state, opposite the first control state, and the first control state is an activation of the one or more of the plurality of first delay elements, and the second control state is a deactivation of the corresponding one or more of the plurality of second delay elements;
• wherein the device is used in a phase locked loop (PLL).

A digitally controlled delay device comprising:

• a plurality of first delay stages connected in series between a first input port and a first output port;
• a plurality of second delay stages connected in series between a second input port and a second output port, wherein each first delay stage of the plurality of first delay stages includes a plurality of first delay elements and each second delay stage of the plurality of second delay stages includes a corresponding plurality of second delay elements;
• and
• a controller configured to perform complementary control of the plurality of first delay elements in each of the plurality of first delay stages and the plurality of second delay elements in each of the plurality of second delay stages based on a digital control signal, wherein the digital control signal is not an input signal of each of the plurality of first delay stages and the plurality of second delay stages, the complementary control refers to controlling one or more of the plurality of first delay elements specified by the digital control signal to be in a first control state and controlling a corresponding one or more of the plurality of second delay elements to be in a second control state, opposite the first control state, and the first control state is an activation of the one or more of the plurality of first delay elements, and the second control state is a deactivation of the corresponding one or more of the plurality of second delay elements;
• wherein the device is used in a phase locked loop (PLL).

A digitally controlled delay device comprising:

• a plurality of first delay stages connected in series between a first input port and a first output port;
• a plurality of second delay stages connected in series between a second input port and a second output port, wherein each first delay stage of the plurality of first delay stages includes a plurality of first delay elements and each second delay stage of the plurality of second delay stages includes a corresponding plurality of second delay elements;
• and
• a controller configured to control, based on a code indicated by a digital control signal, the plurality of first delay elements in the plurality of first delay stages and the plurality of second delay elements in the plurality of second delay stages, wherein
• based on a first code, the controller controls a first set of the plurality of first delay elements of one of the plurality of first delay stages or the plurality of second delay elements of one of the plurality of second delay stages to be in a first state, the first code specifying a number of the first set, and
• based on a second code, greater than the first code, the controller maintains the first set of the plurality of first delay elements of one of the plurality of first delay stages or the plurality of second delay elements of one of the plurality of second delay stages in the first state and controls additional ones of the plurality of first delay elements of one of the plurality of first delay stages or the plurality of second delay elements of one of the plurality of second delay stages to be in a first state, a number of the additional ones being a difference between a number specified by the second code and the number of the first set.