Memory device and method for calibrating impedance thereof

A memory device comprising:

• a memory cell array;
• an input/output circuit configured to control inputting of data to the memory cell array and outputting of data stored in the memory cell array;
• an impedance calibration circuit configured to generate an impedance calibration code based on an external resistor for application to the input/output circuit as an applied impedance calibration code;
• and
• a calibration control circuit configured to compare a new impedance calibration code received from the impedance calibration circuit with a calibration code range to generate a calibration code update flag when the new impedance calibration code is included in the calibration code range,
• wherein the impedance calibration circuit comprises:
• an impedance pad connected to the external resistor;
• a pull-down driver connected to the impedance pad;
• a code generator configured to compare a voltage of the impedance pad and a target voltage to generate a new impedance calibration code;
• and
• a pull-down code control circuit configured to receive the new impedance calibration code and update the applied impedance calibration code to the new impedance calibration code when receiving the calibration code update flag within a specified time after transmitting the new impedance calibration code to the calibration control circuit.