US 12,700,446 B2 · System design for low temperature memory

Abstract

A system can be designed with memory to operate in a low temperature environment. The low temperature memory can be customized for low temperature operation, having a gate stack to adjust a work function of the memory cell transistors to reduce the threshold voltage (Vth) relative to a standard memory device. The reduced temperature can improve the conductivity of other components within the memory, enabling increased memory array sizes, fewer vertical ground channels for stacked devices, and reduced operating power. Based on the differences in the memory, the memory controller can manage access to the memory device with adjusted control parameters based on lower leakage voltage for the memory cells and lower line resistance for the memory array.

Claims20

Dependent claims

A system comprising:

a memory device with an array of memory cells, each memory cell having:
a transistor with an operating temperature in a range of approximately −25 C to +25 C having a gate stack with a combination of metal and highly doped polysilicon that adjusts a work function of the gate stack to reduce a threshold voltage (Vth) from a range of approximately 300-500 mV by 50-150 mV, to result in a reduced leakage voltage for the memory cell and a reduced line resistance for the array of memory cells as compared to the Vth of 300-500 mV;
and
a capacitor;
and
a memory controller coupled to the memory device, the memory controller to manage access to the memory device with adjusted control parameters based on the reduced leakage voltage for the memory cells and the reduced line resistance for the array at the operating temperature.

3 more elements

Dependencies are inferred from the claim text.

System design for low temperature memory

Life of this patent

System design for low temperature memory

Life of this patent

Abstract

Claims20